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參數(shù)資料
| 型號： | MB90F423GA |
| 廠商： | Fujitsu Limited |
| 英文描述： | Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125 |
| 中文描述： | 16位微控制器原件 |
| 文件頁數(shù)： | 19/99頁 |
| 文件大?。?/td> | 1706K |
| 代理商： | MB90F423GA |
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MB90420G/5G (A) Series
19
(Continued)
Address
Register name
Symbol
Read/write Peripheral function
Initial value
2A
H
PPG0 control status register lower
PCNTL0
R/W
16-bit PPG0
0 0 0 0 0 0 0 0
2B
H
PPG0 control status register higher
PCNTH0
R/W
0 0 0 0 0 0 0 -
2C
H
PPG1 control status register lower
PCNTL1
R/W
16-bit PPG1
0 0 0 0 0 0 0 0
2D
H
PPG1 control status register higher
PCNTH1
R/W
0 0 0 0 0 0 0 -
2E
H
PPG2 control status register lower
PCNTL2
R/W
16-bit PPG2
0 0 0 0 0 0 0 0
2F
H
PPG2 control status register higher
PCNTH2
R/W
0 0 0 0 0 0 0 -
30
H
External interrupt enable
ENIR
R/W
External interrupt
0 0 0 0 0 0 0 0
31
H
External interrupt request
EIRR
R/W
XXXXXXXX
32
H
External interrupt level lower
ELVRL
R/W
0 0 0 0 0 0 0 0
33
H
External interrupt level higher
ELVRH
R/W
0 0 0 0 0 0 0 0
34
H
Serial mode register 0
SMR0
R/W
UART 0
0 0 0 0 0 - 0 0
35
H
Serial control register 0
SCR0
R/W
0 0 0 0 0 1 0 0
36
H
Input data register 0/
Output data register 0
SIDR0/
SODR0
R/W
XXXXXXXX
37
H
Serial status register 0
SSR0
R/W
0 0 0 0 1 0 0 0
0 0 0 0 0
0 0
0 0 0 0 0 1 0 0
38
H
Serial mode register 1
SMR1
R/W
UART1
39
H
Serial control register 1
SCR1
R/W
3A
H
Input data register 1/
Output data register 1
SIDR1/
SODR1
R/W
XXXXXXXX
3B
H
Serial status register 1
SSR1
R/W
0 0 0 0 1 0 0 0
3C
H
(Disabled)
3D
H
Clock division control register 0
CDCR0
R/W
Prescaler
0 - - - 0 0 0 0
3E
H
CAN wake-up control register
CWUCR
R/W
CAN
- - - - - - - 0
3F
H
Clock division control register 1
CDCR1
R/W
Prescaler
0 - - - 0 0 0 0
40
H
to 4F
H
Area reserved for CAN interface 0
50
H
Timer control status register 0 lower TMCSR0L
R/W
16-bit reload timer 0
0 0 0 0 0 0 0 0
51
H
Timer control status register 0 high-
er
TMCSR0H
R/W
- - - 0 0 0 0 0
52
H
Timer register 0/
Reload register 0
TMR0/
TMRLR0
R/W
XXXXXXXX
53
H
XXXXXXXX
54
H
Timer control status register 1 lower TMCSR1L
R/W
16-bit reload timer 1
0 0 0 0 0 0 0 0
55
H
Timer control status register 1 high-
er
TMCSR1H
R/W
- - - 0 0 0 0 0
56
H
Timer register 1/
Reload register 1
TMR1/
TMRLR1
R/W
XXXXXXXX
57
H
XXXXXXXX
58
H
Clock timer control register lower
WTCRL
R/W
Real-time
clock timer
0 0 0 - - 0 0 0
59
H
Clock timer control register higher
WTCRH
R/W
0 0 0 0 0 0 0 0
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