參數(shù)資料
型號: MB90F423GA
廠商: Fujitsu Limited
英文描述: Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125
中文描述: 16位微控制器原件
文件頁數(shù): 40/99頁
文件大小: 1706K
代理商: MB90F423GA
MB90420G/5G (A) Series
40
(5) One-shot mode
In down count operation, the count stops when an underflow event (transition from “0000
H
” to “FFFF
H
”) occurs.
This function can generate an interrupt at each underflow. While the counter is operating, a rectangular wave
form indicating that the count is in progress can be output form the TOT0 and TOT1 pins.
(6) Block diagram
UF
CLK
CLK
3
3
2
EN
CSL1 CSL0
OUTEOUTL RELD INTE
UF
CNTE TRG
WOD2WOD1WOD0
P12/TIN0 *
1
<P07/TIN1>
TMRLR0 *
1
<TMRLR1>
TMR0 *
1
<TMR1>
P11/TOT0 *
1
<P06/TOT1>
Internal data bus
16-bit reload register
Reload signal
Reload
control circuit
16-bit timer register (down counter)
Count clock generator circuit
Machine
clock
φ
Prescaler
Gate input
Valid clock
decision circuit
Wait signal
Clear
To UART 0
,
1 *
1
<To A/D converter>
Internal clock
Pins
Input
control
circuit
Clock
selector
Inverted
Output signal
generator
circuit
Pins
External clock
Select
signal
Function selection
Operation
control
circuit
Timer control status register (TNGSR0) *
1
<TNGSR1>
Interrupt
request signal
#17 (11h) *
2
<#28 (10h)>
*1
:
Channel 0 and channel 1. Figures in < > are for channel 1.
*2
:
Interrupt number
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