參數(shù)資料
型號(hào): MB90F334APMC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
封裝: 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LFQFP-120
文件頁(yè)數(shù): 51/120頁(yè)
文件大?。?/td> 1210K
代理商: MB90F334APMC
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)當(dāng)前第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)
MB90330A Series
36
Register list (Analog input enable register)
This register controls the port 7, 8 pins as follows.
0 : Port input/output mode.
1 : Analog input mode.
This bit becomes 1 after a reset.
Register list (Port pull-up resistance register)
Controls the pull-up resistor in input mode.
0 : Without pull-up resistor in input mode.
1 : With pull-up resistor in input mode.
Meaningless in output mode. (Without pull-up resistor)/The input/output mode is decided by the setting of the
port direction register (DDR).
Without pull-up resistor is used in stop mode (SPL = 1). (High-Z) This function is disabled when the external
bus is used. Do not attempt to write to this register.
Register list (Output pin register)
Controls open-drain in output mode.
0 : Serves as a standard output port in output mode.
1 : Serves as an open-drain output port in output mode.
Meaningless in input mode (output High-Z)./The input/output mode is decided by the setting of the port direction
register (DDR). This function is disabled when the external bus is used. Do not attempt to write to this register.
ADER0
bit
Initial Value Access
Address : 00001EH
11111111B
R/W
ADER1
bit
Address : 00001FH
11111111B
R/W
76
5
4
3
2
1
0
ADE3
ADE2
ADE1
ADE0
ADE7
ADE6
ADE5
ADE4
15
14
13
12
11
10
9
8
ADE11
ADE10
ADE9
ADE8
ADE15
ADE14
ADE13
ADE12
RDR0
bit
Initial Value Access
Address : 00001CH
00000000B
R/W
RDR1
bit
Address : 00001DH
00000000B
R/W
76
5
4
3
2
1
0
RD06
RD07
RD05
RD04
RD03
RD02
RD01
RD00
15
14
13
12
11
10
9
8
RD16
RD17
RD15
RD14
RD13
RD12
RD11
RD10
ODR4
bit
Initial Value Access
Address : 00001BH
00000000B
R/W
76
5
4
3
2
1
0
OD46
OD47
OD45
OD44
OD43
OD42
OD41
OD40
相關(guān)PDF資料
PDF描述
MB90333APMC 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP120
MB90F334APMC1 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
MB90F395HAPMT 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
MB90F428GBPFV 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
MB90F423GBPFV 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB90F334APMC1-GE1 制造商:FUJITSU 功能描述:
MB90F334APMC1-G-SPE1 制造商:FUJITSU 功能描述:
MB90F334APMC-G-JNE1 制造商:FUJITSU 功能描述:
MB90F334APMC-G-SNE1 制造商:FUJITSU 功能描述:
MB90F334APMC-G-SPE1 制造商:FUJITSU 功能描述: