參數(shù)資料
型號(hào)： MB90F334APMC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
封裝： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LFQFP-120
文件頁數(shù)： 100/120頁
文件大?。?/td> 1210K
代理商： MB90F334APMC
MB90330A Series
80
18. Delay interrupt generator module
The delay interrupt generation module is a module that generates interrupts for switching tasks. A hardware
interrupt can be generated by software.
Delay interrupt generator module function
Block Diagram
Function and control
Interrupt source
Setting the R0 bit in the delayed interrupt request generation/release register to 1
(DIRR: R0 = 1) generates a delayed interrupt request.
Setting the R0 bit in the delayed interrupt request generation/release register to 0
(DIRR: R0 = 0) cancels the delayed interrupt request.
Interrupt control
No setting of permission register is provided.
Interrupt flag
Set in bit R0 of the delayed interrupt request generation /clear register (DIRR : R0)
EI2OS support
Not ready for extended intelligent I/O service (EI2OS).
R0
Internal data bus
Delay interrupt factor generation/release
register(DIRR)
S Interrupt
request
R latch
: Undefined
Interrupt
request
signal
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB90F334APMC1-GE1 制造商:FUJITSU 功能描述:
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MB90F334APMC-G-JNE1 制造商:FUJITSU 功能描述:
MB90F334APMC-G-SNE1 制造商:FUJITSU 功能描述:
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