參數(shù)資料
型號: MB90980
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁數(shù): 41/48頁
文件大小: 321K
代理商: MB90980
MB90980 Series
41
(9) Trigger Input Timing
(V
CC
=
2.7 V to 3.6 V, V
SS
=
0.0 V, T
A
=
40
°
C to
+
85
°
C)
Value
* : t
CP
is internal operating clock cycle time. Refer to “ (1) Clock Timing”.
(10) Up-down Counter Timing
(V
CC
=
2.7 V to 3.6 V, V
SS
=
0.0 V, T
A
=
40
°
C to
+
85
°
C)
Value
* : t
CP
is internal operating clock cycle time. Refer to “ (1) Clock Timing”.
Parameter
Symbol
Pin name
Condi-
tions
Unit
Remarks
Min
Max
Input pulse width
t
TRGH
,
t
TRGL
ADTG,
IRQ0 to IRQ7
5 t
CP
*
ns
μ
s
Normal operation
1
Stop mode
Parameter
Symbol
Pin name
Conditions
Unit
Remarks
Min
Max
AIN input “H” pulse width
t
AHL
AIN0, AIN1,
BIN0, BIN1
Load
conditions
80 pF
8 t
CP
*
ns
AIN input “L” pulse width
t
ALL
8 t
CP
*
ns
BIN input “H” pulse width
t
BHL
8 t
CP
*
ns
BIN input “L” pulse width
AIN
↑→
BIN
rise time
BIN
↑→
AIN
fall time
AIN
↓→
BIN
rise time
BIN
↓→
AIN
rise time
BIN
↑→
AIN
rise time
AIN
↑→
BIN
fall time
BIN
↓→
AIN
rise time
AIN
↓→
BIN
rise time
ZIN input “H” pulse width
t
BLL
8 t
CP
*
ns
t
AUBU
4 t
CP
*
ns
t
BUAD
4 t
CP
*
ns
t
ADBD
4 t
CP
*
ns
t
BDAU
4 t
CP
*
ns
t
BUAU
4 t
CP
*
ns
t
AUBD
4 t
CP
*
ns
t
BDAD
4 t
CP
*
ns
t
ADBU
4 t
CP
*
ns
t
ZHL
ZIN0, ZIN1
4 t
CP
*
ns
ZIN input “L” pulse width
t
ZLL
4 t
CP
*
ns
0.8 V
CC
IRQ0 to IRQ7
ADTG
0.8 V
CC
0.2 V
CC
0.2 V
CC
t
TRGH
t
TRGL
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