參數(shù)資料
型號(hào): MB90522PFV
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: Quadruple 2-Input Positive-NAND Gates 14-CFP -55 to 125
中文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP120
封裝: PLASTIC, QFP-120
文件頁(yè)數(shù): 20/106頁(yè)
文件大小: 1539K
代理商: MB90522PFV
MB90520 Series
20
I
BLOCK DIAGRAM
F
2
MC-16LX
CPU
X0, X1
X0A, X1A
RST
HST
P45/SIN1
P46/SOT1
P47/SCK1
P07
P24/AIN0
P25/BIN0
P26/ZIN0/INT7
P00/INT0 to P06/INT6
P20/IC00
P21/IC01
P32/OUT0
P33/OUT1
P34/OUT2
P35/OUT3
P31/CKOT
P30
P36/PG00
P37/PG01
P40/PG10
P41/PG11
P42/SIN0
P43/SOT0
P44/SCK0
P10/WI0 to P17/WI7
P80/SEG16 to P87/SEG23
P90/SEG24 to P97/SEG31
PA0/SEG08 to PA7/SEG15
SEG00 to SEG07
V0 to V3
P74/COM0 to P77/COM3
DV
CC
DV
SS
P70/TI0/OUT4
P71/TO0/OUT5
P72/TI1/OUT6
P73/TO1/OUT7
P22/IC10
P23/IC11
P60/AN0 to P67/AN7
AV
CC
AV
SS
AVRH
AVRL
P27/ADTG
P50/SIN2/AIN1
P51/SOT2/BIN1
P52/SCK2/ZIN1
P53/DA0
P54/DA1
Clock control
block*
1
(including
timebase timer)
Oscillation clock
Sub clock
Port 0*
2
DTP/
external
interrupt
circuit
7
7
24
8
8
8
8
4
4
4
Port 8*
5
, 9*
5
, A*
5
LCD
controller/
driver
Port 7*
4
16-bit
re-load
timer 0
16-bit
re-load
timer 1
Port 2*
4
3
8/16-bit
up/down
counter/timer
0, 1
Output
compare
(OCU)
16-bit
I/O timer 2
4
16-bit
free-run
timer 2
Input
capture 1
(ICU)
2
Port 2*
4
Port 6*
4
8
8
8/10-bit
A/D
converter
Port 2*
4
Interrupt controller
Port 5*
5
SIO ch.1
2
8-bit D/A
converter
×
2 ch.
RAM
ROM
Input
capture 0
(ICU)
16-bit
I/O timer 1
2
16-bit
free-run
timer 1
4
Output
compare 0
(OCU)
Clock output
Port 3*
4
2
2
8/16-bit
PPG
timer 0, 1
UART
(SCI)
SIO ch.0
Port 4*
2
Port 1*
2
8
8
Wake-up
interrupt
Notes: Actually 16-bit free-run timer 1 is supported although two free-run timers are seemingly supported.
*1: The clock control circuit comprises a watchdog timer, a timebase timer, and a power consumption controller.
*2: A register for setting a pull-up resistor is supported.
*3: This is a high-current port for an LCD drive.
*4: A register for setting a pull-up resistor is supported. Signals in the CMOS level are input and output.
*5: Also used for LCD output. With this port used as is, Nch open-drain output develops. A register for setting a pull-up resistor
is supported.
I
MD0 to MD2,
C, V
CC
, V
SS
Other pins
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