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參數(shù)資料
| 型號： | MB90497GPMC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LFQFP-64 |
| 文件頁數(shù)： | 44/96頁 |
| 文件大小： | 2317K |
| 代理商： | MB90497GPMC |
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MB90495G Series
DS07-13713-6E
49
8.
Delayed Interrupt Generation Module
The delayed interrupt generation module generates interrupts for switching tasks.
This module can be used to generate hardware interrupts from the software.
Overview of the Delayed Interrupt Generation Module
Use the delayed interrupt generation module to generate or cancel hardware interrupts from the software.
Overview of the Delayed Interrupt Generation Module
Delayed Interrupt/Generation Module Block Diagram
Interrupt number
Below is the interrupt number used by the delayed interrupt generation module.
Interrupt number : #42 (2AH)
Functions and Control
Interrupt Condition
When the R0 bit of the delayed interrupt request generation/cancel register is
set to 1 (DIRR : R0
= 1) : Generate interrupt request
When the R0 bit of the delayed interrupt request generation/cancel register is
set to 0 (DIRR : R0
= 0) : Cancel interrupt request
Interrupt number
#42 (2AH)
Interrupt control
There is no enable setting from the register
Interrupt flag
Stored in bit DIRR : R0
EI2OS
Does not support extended intelligent I/O service
R0
S
R
Internal data bus
Delayed interrupt request generation/cancel register
(DIRR)
Interrupt
request latch
Interrupt
request signal
: Undefined
Interrupt request latch:This latch stores the delayed interrupt request generation/cancel register setting
(generates/cancels delayed interrupt requests) .
Delayed interrupt request generation/cancel register (DIRR) :
Generates or cancels delayed interrupt requests.
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相關(guān)代理商/技術(shù)參數(shù) |
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