
MB90495G Series
37
3.
Watchdog Timer
The watchdog timer is a 2-bit timer used as a count clock for the timer-based or watch timer.
If the counter is not cleared within the interval time, it resets the CPU.
Watchdog Timer Function
The watchdog timer is a timer counter used to deal with runaway programs. Once the watchdog timer is
launched, it is necessary to keep clearing its counter within the specified interval. If the specified interval
passes without the watchdog timer counter being cleared, the CPU will be reset. This feature is called the
watchdog timer.
The watchdog timer interval traces back to the clock interval input as the count clock. A watchdog reset is
generated for the smallest to largest times.
The clock source output destination is set by the watchdog clock selection bit of the watch timer control register
(WTC : WDCS) .
The watchdog timer interval is set time-base timer output selection bit/watch timer output selection bit of the
watchdog timer control register (WDTC : WT1, WT0) .
Watchdog Timer Intervals
Minimum
HCLK : oscillation clock (4 MHz) ; SCLK : Subclock (8.192 kHz)
Notes:
If the count clock of the watchdog timer is set to time-base timer output (overflow signal) , then clearing the
time-base timer could make it take longer to reset the watchdog.
If you are using a subclock as the machine clock, make sure to select watch timer output by setting the
watchdog timer clock source selection bit (WDCS) of the watch timer control register (WTC) to 0.
Maximum
Clock Interval
2
14
±
2
11
/HCLK
2
16
±
2
13
/HCLK
2
18
±
2
15
/HCLK
2
21
±
2
18
/HCLK
Minimum
Maximum
Clock Interval
2
12
±
2
9
/SCLK
2
15
±
2
12
/SCLK
2
16
±
2
13
/SCLK
2
17
±
2
14
/SCLK
Approx. 3.58 ms
Approx. 4.61 ms
Approx. 0.457 s
Approx. 0.576 s
Approx. 14.33 ms
Approx. 18.3 ms
Approx. 3.584 s
Approx. 4.608 s
Approx. 57.23 ms
Approx. 73.73 ms
Approx. 7.168 s
Approx. 9.216 s
Approx. 458.75 ms Approx. 589.82 ms
Approx. 14.336 s Approx. 18.432 s