參數(shù)資料
型號: MB90495G
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller CMOS
中文描述: 16位微控制器專有的CMOS
文件頁數(shù): 29/92頁
文件大小: 450K
代理商: MB90495G
MB90495G Series
29
(Continued)
: Available
×
: Not available
: Available, EI
2
OS halt function supplied
: Available for interrupt conditions not shared by ICR
*1 :
The interrupt level is the same for peripheral devices sharing the ICR register.
Peripheral devices that share the ICR register and use the extended intelligent I/O service only utilize one set.
If one side of a peripheral device sharing the ICR register is set to extended intelligent I/O service, the other
side cannot use interrupts.
*2 : Only the 16-bit reload timer is compatible with EI
2
OS. Since PPG does not support EI
2
OS, if you use EI
2
OS
with the 16-bit reload timer, prohibit interrupts by PPG.
*3 : Priority if two or more interrupts with the same level are generated simultaneously.
Interrupt Condition
EI
2
OS
Compatible
Interrupt Vector
Interrupt Register
Priority
*
3
Number
Address
ICR
Address
UART0 reception complete
#39
27
H
FFFF60
H
ICR14
0000BE
H
(*
1
)
UART0 transmission complete
#40
28
H
FFFF5C
H
Flash memory
×
×
#41
29
H
FFFF58
H
ICR15
0000BF
H
(*
1
)
Delayed interrupt generation module
#42
2A
H
FFFF54
H
Lowest
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