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參數(shù)資料
| 型號： | MB90440G |
| 廠商： | Fujitsu Limited |
| 英文描述： | Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 43/61頁 |
| 文件大?。?/td> | 644K |
| 代理商： | MB90440G |
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MB90440G Series
43
(4) Power-on Reset
(V
CC
=
5.0 V
±
10
%
, V
SS
=
AV
SS
=
0.0 V, T
A
=
40
°
C to
+
105
°
C)
Value
Unit
Min
Max
* : V
CC
must be kept lower than 0.2 V before power-on.
Note : The above values are used for causing a power-on reset.
Some registers in the device are initialized only upon a power-on reset. To initialize these registers, turn the
power supply on using the above values.
Parameter
Symbol
Pin
Condition
Remarks
Power supply rising time
t
R
V
CC
0.05
30
ms
*
Power supply cut-off time
t
OFF
V
CC
50
ms
Due to repeated operations
V
CC
V
CC
V
SS
3 V
t
R
t
OFF
2.7 V
0.2 V
0.2 V
0.2 V
RAM data Hold
Sudden changes in the power supply voltage may cause a power on reset. We
recommend to raise the voltage smoothly to suppress fluctuation during operation,
as shown in the figure below. Perform while not using the PLL clock. However, if
voltage drops are within 1 V/s, you can operate while using the PLL clock.
We recommend rising speed
of the supply voltage at 50
mV/ms or slower
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