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參數(shù)資料
| 型號： | MB90440G |
| 廠商： | Fujitsu Limited |
| 英文描述： | Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 3/61頁 |
| 文件大小： | 644K |
| 代理商： | MB90440G |
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MB90440G Series
3
(Continued)
16-bit I/O timers
16-bit free-run timers : 1 channel
16-bit input capture : 8 channels
16-bit output compare : 4 channels
Extended I/O serial interfaces : 1 channel
UART0
Full-duplex, double-buffered (8 bit)
Can be used for clock synchronous and asynchronous transfer (with start/stop bit)
UART1 (SCI)
Full-duplex, double-buffered (8 bit)
Can be used for clock synchronous and asynchronous serial transfer (extended I/O serial)
External interrupt inputs : 8 channels
Extended intelligent I/O service (EI
2
OS) is started by external input and external interrupt generation module
Delayed interrupt generation module : interrupt request for task switching
8/10 bit A/D converter : 8 channels
8/10-bit resolution selectable
Can be started by external trigger input
Conversion time : 6.12
μ
s
FULL-CAN interface
3 channels
Conform to V2.0 Part A and Part B
Supports very flexible message buffering (mail-box and FIFO buffering can be mixed)
External bus interface : maximum 16 Mbyte address space
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