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參數(shù)資料
| 型號(hào)： | MB90234PFV-XXX |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 38/83頁(yè) |
| 文件大?。?/td> | 1566K |
| 代理商： | MB90234PFV-XXX |
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43
MB90230 Series
9. DTP/External Interrupt
The data transfer peripheral (DTP) is located between external peripherals and the F2MC-16F CPU. It receives
a DMA request or interrupt request generated by the external peripherals and reports it to the F2MC-16F CPU
to activate the extended intelligent I/O service or interrupt handler. The user can select two request levels of
“H” and “L” for extended intelligent I/O service (EI2OS) or, four request levels of “H,” “L,” rising edge, and falling
edge for external interrupt requests.
(1) Register Configuration
(2) Block Diagram
EIRR
ENIR
Interrupt/DTP enable register
000031H, 30H
ELVR
Request level setting register
000032H
15
87
0
bit
Address:
4
Gate
4
Source F/F
Edge detection circuit
3
Interrupt DTP source register
4
Request level setting register
8
Request input
F
2 MC-16
bus
Interrupt DTP source register
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相關(guān)代理商/技術(shù)參數(shù) |
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