參數(shù)資料
型號： MB90234PFV-XXX
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁數(shù)： 72/83頁
文件大?。?/td> 1566K
代理商： MB90234PFV-XXX
MB90230 Series
74
Table 19
Shift Instructions (Byte/Word/Long Word) [27 Instructions]
For an explanation of “(a)” and “(b)”, refer to Table 4, “Number of Execution Cycles for Each Form of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
*1: 3 when R0 is 0, 3 + (R0) in all other cases.
*2: 3 when R0 is 0, 4 + (R0) in all other cases.
*3: 3 when imm8 is 0, 3 + (imm8) in all other cases.
*4: 3 when imm8 is 0, 4 + (imm8) in all other cases.
Mnemonic
#
~
B
Operation
LH AH
I
S
T
N
Z
V
C
RMW
RORC A
ROLC A
RORC ear
RORC eam
ROLC ear
ROLC eam
ASR
A, R0
LSR
A, R0
LSL
A, R0
ASR
A, #imm8
LSR
A, #imm8
LSL
A, #imm8
2
2+
2
2+
2
3
2
3+ (a)
2
3+ (a)
*1
*3
0
2
× (b)
0
2
× (b)
0
byte (A)
← Right rotation with carry
byte (A)
← Left rotation with carry
byte (ear)
← Right rotation with carry
byte (eam)
← Right rotation with carry
byte (ear)
← Left rotation with carry
byte (eam)
← Left rotation with carry
byte (A)
← Arithmetic right barrel shift (A, R0)
byte (A)
← Logical right barrel shift (A, R0)
byte (A)
← Logical left barrel shift (A, R0)
byte (A)
← Arithmetic right barrel shift (A, imm8)
byte (A)
← Logical right barrel shift (A, imm8)
byte (A)
← Logical left barrel shift (A, imm8)
–
*
–
*
–
*
–
*
–
*
–
ASRW A
LSRW A/SHRW A
LSLW A/SHLW A
ASRW A, R0
LSRW A, R0
LSLW A, R0
ASRW A, #imm8
LSRW A, #imm8
LSLW
A, #imm8
1
2
3
2
*1
*3
0
word (A)
← Arithmetic right shift (A, 1 bit)
word (A)
← Logical right shift (A, 1 bit)
word (A)
← Logical left shift (A, 1 bit)
word (A)
← Arithmetic right barrel shift (A, R0)
word (A)
← Logical right barrel shift (A, R0)
word (A)
← Logical left barrel shift (A, R0)
word (A)
← Arithmetic right barrel shift (A, imm8)
word (A)
← Logical right barrel shift (A, imm8)
word (A)
← Logical left barrel shift (A, imm8)
–
*
–
*
–
*
–
*
R
*
–
*
–
ASRL A, R0
LSRL A, R0
LSLL
A, R0
ASRL
A, #imm8
LSRL
A, #imm8
LSLL
A, #imm8
2
3
*2
*4
0
long (A)
← Arithmetic right shift (A, R0)
long (A)
← Logical right barrel shift (A, R0)
long (A)
← Logical left barrel shift (A, R0)
long (A)
← Arithmetic right shift (A, imm8)
long (A)
← Logical right barrel shift (A, imm8)
long (A)
← Logical left barrel shift (A, imm8)
–
*
–
*
–
*
–
*
–
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