參數(shù)資料
型號: MB90234PFV-XXX
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 27/83頁
文件大?。?/td> 1566K
代理商: MB90234PFV-XXX
33
MB90230 Series
4. Extended Serial I/O Interface
This block is a serial I/O interface implemented on a single 8-bit channel that can transfer data in synchronization
with clock pulses. It allows the “LSB first” or “MSB first” option to be selected for data transfer. The serial I/O
port to be used can also be selected.
There are two serial I/O operation modes available:
Internal shift clock mode: Transfers data in synchronization with internal clock pulses.
External shift clock mode: Transfers data in synchronization with clock pulses entered from an external pin
(SCKx). In this mode, data can be transferred by instructions from the CPU by
operating the general-purpose port that shares the external pin (SCKx).
(1) Register Configuration
(2) Block Diagram
SMD2 SMD1
SMD0
SIE
SIR
BUSY
STOP
STRT
15
14
13
12
11
10
9
8
OUTC
MODE
BDS
SOE
SCOE
7
6
5
4
321
0
D7
D6
D5
D4
D3
D2
D1
D0
7
6
5
4
321
0
Address: 000025H
Address: 000024H
Address: 000026H
bit
Serial mode control status
register (SMCS)
Serial data register
(SDR)
Internal data bus
(MSB first) D0 to D7
Selecting transfer direction
Read
Write
SDR (Serial data register)
Internal clock
Control circuit
Shift clock counter
Interrupt
request
SIN1, 2
SOT1, 2
SCK1, 2
SMD2 SMD1 SMD0
SIE
SIR
BUSY STOP STRT MODE BDS
D7 to D0 (LSB first)
21
0
SOE
Internal data bus
SCOE
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