![](http://datasheet.mmic.net.cn/330000/MB86967_datasheet_16436356/MB86967_7.png)
7
MB86967
(Continued)
Pin no.
2
Symbol
INPACK
Pin name
INPUT RESPONSE
I/O
O
Function
When CE,REG, and IORD are 0s and the address on
the address bus agrees with the I/O port in the card,
a Low level is output to this pin. When I/O addresses
are independent, a Low level is always output to this
pin when CE,REG, and IORD are 0s.
When 16-bit access (word access) to the I/O port is
possible, a Low level is output to this pin. When a
High level is output to this pin, the system has 8-bit
access (byte access).
84
IOIS16
16-BIT I/O PORT
O
Note: In the IC memory interface mode (no write
operation to the CCR) when power is applied
and a reset is canceled, this pin serves as a
WP+ (write-protect) pin. Under this condition, a
High level is output to this pin (write-protect).
1 should be set in the device ID tuple, WPS, in
the CIS to perform a write operation to the card.
A Low level is output to this pin to request software
service from the system. For no interrupt request, a
High level is output to this pin. An interrupt signal is
sent to one of the interrupt request signals on the bus
in the system via the socket interface.
92
IREQ
INTERRUPT
REQUEST
O
Note: In IC memory interface mode (no write
operation to the CCR) when power is applied
and a reset is canceled, this pin serves as a
+RDY/BSY pin. Under this condition, a High
level (+RDY) is output to this pin.
This pin is used for output of EEPROM OR FLASH
chip select signals.
This pin is used for output of EEPROM OR FLASH
read signals.
This pin is used when I/O-reading the I/O number.
Connection of this pin to the most significant address
of EEPROM OR FLASH permits I/O-reading of
address space in the upper half of ROM. For a write
operation, both the write enable (WE) and I/O write
(IOWR) pins must be enabled. If there is no need to
set the ID number in the CIS for I/O-reading, this pin
should be kept open.
98
ROMS
ROM SELECT
O
99
ROMRD
ROM READ
O
97
ROMAD
ROM ADDRESS
O