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參數(shù)資料
| 型號： | MB86942PFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Peripheral LSI for SPARClite |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP144 |
| 封裝： | PLASTIC, QFP-144 |
| 文件頁數(shù)： | 10/49頁 |
| 文件大小： | 598K |
| 代理商： | MB86942PFV |
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10
MB86941/942
3. TIMER SIGNALS (16)
Pin symbol
I/O
Pin no.
Pin name
Description
CLK0
I
61
CLK0 : Timer Clock 0
to
CLK3 : Timer Clock 3
Timer control signal pin
These pins are used to input an external clock signal
to the timer.
In external clock mode these signals are synchronized
with the internal clock.
Input pin for count operation control signals to the
timer
In MODE0 through MODE3, the input signal is a gate
signal. In MODE4, the pins input an external trigger
signal.
IN0
I
62
OUT0
O
65
CLK1
I
71
IN0 : Timer Input 0
to
IN3 : Timer Input 3
IN1
I
70
OUT1
O
67
CLK2
IN2
OUT2
CLK3
IN3
OUT3
I
I
76
77
79
74
75
80
OUT0 : Timer Output 0
to
OUT3 : Timer Output 3
Timer output pin
The output waveform is determined by the mode
setting:
Periodic signal waveform output
Square wave output
One-shot pulse waveform output
At reset, an “L” level signal is output.
O
I
I
O
ACK0
I
63
Asynchronous Clock 0
Prescaler asynchronous clock pin
Input can be asynchronous with respect to the system
clock signal input at the CLOCK pin.
If an external clock signal is selected by the PRS0 and
PRS1 registers, this signal can be used as a source
clock for the prescaler. The clock signal divided by the
prescaler is output at the PRSCK0, PRSCK1 pins.
If these pins are not used, they should be fixed at “L”
level.
Prescaler Clock Output 0Prescaler clock output pin
An “L” level signal is output at reset.
Prescaler Clock Output 1
ACK1
I
69
Asynchronous Clock 1
PRSCK0
PRSCK1
O
O
64
68
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| MB86960 | NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE) |
| MB86960APF-G | NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE) |
| MB86961A | UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APD-G | UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APF-G | UNIVERSAL INTERFACE FOR 10BASET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86950BPD-G | 制造商:FUJITSU 功能描述: |
| MB86960 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE) |
| MB86960APF-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:NETWORK INTERFACE CONTROLLER with ENCODER/DECODER (NICE) |
| MB86961A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APD-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
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