參數(shù)資料
型號(hào)： MB86703PF
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP80
封裝： 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 5/32頁
文件大?。?/td> 189K
代理商： MB86703PF
Plug and Play ISA Controller
MB86703
13
Figure 3. MB86703 Resource Assignments in DMA Mode
SUBMODE 0
LD0
INTA
INTB
INTC
INTD
/IOCSA
/IOCSB
/IOCSC
/IOCSD
/MSCA{DRQA}
/MSCB{/DACKA}
INT0
INT1
/IOCS0
/IOCS1
/IOCS2
/IOCS3
/REFRESH{DRQB}
{/DACKB}
DRQ0
DRQ1
/DACK0
/DACK1
/DACK0
/DACK1
SUBMODE 1
LD0
LD1
INTA
INTB
/IOCSA
/IOCSB
/MSCA{DRQA}
/MSCB{/DACKA}
/REFRESH{DRQB}
{/DACKB}
INTC
INTD
INT0
INT1
/IOCSC
/IOCSD
/IOCS0
/IOCS1
INT0
/IOCS0
SUBMODE 2
LD0
LD1
INTA
INTB
/IOCSA
/IOCSB
/MSCA{DRQA}
/MSCB{/DACKA}
/REFRESH{DRQB}
{/DACKB}
INTC
INTD
INT0
INT1
/IOCSC
/IOCSD
/IOCS0
/IOCS1
INT0
/IOCS0
SUBMODE 3
LD0
LD1
LD2
LD3
INTA
/IOCSA
/MSCA{DRQA}
/MSCB{/DACKA}
INTB
/IOCSB
/REFRESH{DRQB}
{/DACKB}
INTC
/IOCSC
INT0
/DRQ0
INTD
/IOCSD
/DRQ0
INT0
/IOCS0
Registers
Operation of the MB86703 is controlled by values
written into registers within the device, while other reg-
isters provide device status. The register set consists
of a combination of Plug and Play standard registers
and vendor dened registers. Tables 3 and 4 are maps
of the user-accessible internal registers implemented
in the MB86703 for MEMORY and DMA modes,
respectively. In this table, a “Y” in the STD column
indicates that this is a standard PnP register and is
described in the Plug and Play ISA specication
(Appendix A). The table also provides default values
and denes, for each Plug and Play state, the type of
access available. Exceptions to the specication are
detailed in Table 5. Vendor-dened registers con-
tained in the MB86703 are described in Tables 6 to 8.
相關(guān)PDF資料
PDF描述
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參數(shù)描述
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