參數(shù)資料
型號(hào): MB86602C
廠商: Fujitsu Limited
英文描述: SCSI-II Protocol Controller (Differential)(SCSI-II 協(xié)議控制器)
中文描述: 支持SCSI - II協(xié)議控制器(差異)(支持SCSI - II協(xié)議控制器)
文件頁(yè)數(shù): 2/57頁(yè)
文件大?。?/td> 487K
代理商: MB86602C
MB86602C
2
ID:
Identifier (Identification number from 0 to 7 assigned to application systems
connected to the SCSI bus.)
80-series:
The general name for MPUs based on the 8080A command structure set
developed by Intel Corporation.
68-series:
The general name for MPUs developed by Motorola Corporation.
(Continued)
Synchronous transfer (Transfer speed: 10 Mbyte/sec max., Maximum offset = 32, 32-level transfer speed)
Asynchronous transfer (Transfer speed: 5 Mbyte/sec max.)
Transfer parameters (transfer mode, transfer speed, transfer offset) can be set for 7 connected devices.
Differential transmission format: Maximum cable length = 25m
An external differential driver/receiver is required (see “
I
System Configuration Example”).
Data Transfer
Automatic selection/reselection response
Automatically performs pre-determined reception upon selection or reselection
Initiator:
Without sending a command, can operate up to a message reception.
Target:
Without sending a command, can operate up to a command reception.
Automatic reception response
Initiator:
By sending a command, can receive data on the new phase to which the target has changed.
Target:
When the initiator has generated an attention condition, the target can receive an initiator mes-
sage without a command.
Internal 32-byte data register (FIFO) for the data phase
Independent internal 32-byte send and receive buffers for the message, command, and status phases.
(32 bytes
×
2)
Internal 16-bit transfer block register and 24-bit transfer byte register. These enable transfer 1 Tbyte
(1 Tbyte = 16 MB
×
64k blocks).
Independent data transfer bus so that the microprocessor can be operated during data transfers.
Specifies parity-through and generate.
System Bus Interface
Separate MPU bus and DMA bus. Both 16-bit and 8-bit operation are possible.
Can be connected directly to 80-series and 68-series MPUs.
Support two types of transfer.
Programmed transfer
DMA transfer (burst and handshake mode)
Commands
In addition to standard commands, supports sequential commands for sequence operations and program-
mable program commands.
Command queuing function
By putting a tag on a command phase command, that command can be sent consecutively.
256 bytes of internal memory is available for command program memory and command queuing buffer.
Others
CMOS process
System clock frequency: 12 MHz to 40 MHz
+5V single source
SCSI-II: Enhanced Small Computer System Interface
ANSI:
American National Standard Institute
SPC:
SCSI-2 Protocol Controller
MPU:
Micro-Processing Unit
DMA:
Direct Memory Access
FIFO:
First-In First-Out
相關(guān)PDF資料
PDF描述
MB86603 Communication Control SCSI-II Protocol Controller(通信控制SCSI-II協(xié)議控制器)
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