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| 型號： | MAXQ8913EWG+T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 10 MHz, RISC MICROCONTROLLER, PBGA58 |
| 封裝： | ROHS COMPLIANT, WLP-58 |
| 文件頁數(shù)： | 2/22頁 |
| 文件大小： | 281K |
| 代理商： | MAXQ8913EWG+T |
MAXQ8913
16-Bit, Mixed-Signal Microcontroller with Op Amps,
ADC, and DACs for All-in-One Servo Loop Control
10
______________________________________________________________________________________
I2C BUS CONTROLLER TIMING
(All values referenced to VIH_I2C(MIN) and VIL_I2C(MAX). See Figure 5.)
STANDARD MODE
FAST MODE
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
UNITS
Operating Frequency
fI2C
0
100
0
400
kHz
Hold Time After (Repeated) START
tHD:STA
4.0
0.6
μs
Clock Low Period
tLOW_I2C
4.7
1.3
μs
Clock High Period
tHIGH_I2C
4.0
0.6
μs
Setup Time for Repeated START
tSU:STA
4.7
0.6
μs
Hold Time for Data (Notes 20, 21)
tHD:DAT
0
3.45
0
0.9
μs
Setup Time for Data (Note 22)
tSU:DAT
250
100
ns
SDA/SCL Fall Time (Note 23)
tF_I2C
300
20 + 0.1CB
300
ns
SDA/SCL Rise Time (Note 23)
tR_I2C
1000
20 + 0.1CB
300
ns
Setup Time for STOP
tSU:STO
4.0
0.6
μs
Bus-Free Time Between STOP and START
tBUF
4.7
1.3
μs
Capacitive Load for Each Bus Line
CB
400
pF
Noise Margin at the Low Level for Each Connected
Device (Including Hysteresis)
VNL_I2C
0.1 x
VDVDD
0.1 x
VDVDD
V
Noise Margin at the High Level for Each Connected
Device (Including Hysteresis)
VNH_I2C
0.2 x
VDVDD
0.2 x
VDVDD
V
Note 20: A device must internally provide a hold time of at least 300ns for the SDA signal (referenced to the VIH_I2C(MIN) of the SCL
signal) to bridge the undefined region of the falling edge of SCL.
Note 21: The maximum tHD:DAT need only be met if the device does not stretch the low period (tLOW_I2C) of the SCL signal.
Note 22: A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement tSU:DAT
≥ 250ns must
be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does
stretch the low period of the SCL signal, it must output the next data bit to the SDA line tR_I2C(MAX) + tSU:DAT = 1000 + 250
= 1250ns (according to the standard-mode I2C specification) before the SCL line is released.
Note 23: CB = Total capacitance of one bus line in pF.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAXQ8913EWG-T&R+ | 制造商:Maxim Integrated Products 功能描述:MAXQ8913 IMAGE STABILIZER WLF T&R - Gel-pak, waffle pack, wafer, diced wafer on film |
| MAXQ8913X-0000+ | 功能描述:16位微控制器 - MCU 16-Bit Mxd Sgnl MCU w/Op Amp ADC & DAC RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MAXQ-H2000 | 功能描述:子卡和OEM板 HDR BRD FOR MAX2000-RAX RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
| MAXQ-JTAG | 功能描述:JTAG調(diào)試器 JTAG FOR PRGRAMNG/ DEBUGGING MAXQ RoHS:否 制造商:Olimex Ltd. 產(chǎn)品:JTAG In-Circuit Debuggers 工具用于評估:MSP430 Flash MCUs 用于:MSP430 Kick Start, MSPGCC 核心:MSP430 接口類型:JTAG, USB 工作電源電壓:12 V |
| MAXQ-JTAG-USB | 功能描述:JTAG調(diào)試器 JTAG FOR PRGRAMNG/ DEBUGGING MAXQ RoHS:否 制造商:Olimex Ltd. 產(chǎn)品:JTAG In-Circuit Debuggers 工具用于評估:MSP430 Flash MCUs 用于:MSP430 Kick Start, MSPGCC 核心:MSP430 接口類型:JTAG, USB 工作電源電壓:12 V |
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