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參數(shù)資料
| 型號： | MAXQ8913EWG+T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 10 MHz, RISC MICROCONTROLLER, PBGA58 |
| 封裝： | ROHS COMPLIANT, WLP-58 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大?。?/td> | 281K |
| 代理商： | MAXQ8913EWG+T |
MAXQ8913
suitable for driving self-commutating DC motors or
voice coil motors.
Each external DAMP is differentially driven by a 10-bit
DAC. The DAC output common mode is 1.25V, based
on the bandgap reference, and each differential output
can swing from GND to 2.5V (if VDVDD
≥ 3V), so the
effective differential peak-to-peak voltage is 5V. The
DAMP has a 6dB gain, so its ouput can swing 10V (if
DAMP supply = 5V).
The differential output voltage follows the simple formula:
VDIFF = 2.5 x (code - 512)/512V
There are four Class D amplifier control bits and one
status bit. The SHDNR and SHDNL pins are the active-
high shutdown controls for the two Class D amplifiers,
respectively. The SYNCIN_DIV bits control the input
clock to the Class D amplifier sawtooth generator. The
SYNCIN frequency must fall within 2MHz and 2.8MHz.
The optimal frequency is 2.2MHz. The frequency of the
high-frequency oscillator and the divide ratio need to
be chosen wisely to accomodate this requirement. For
example, if a 9MHz crystal is used, a divide-by-4 ratio
produces a SYNCIN frequency of 2.25MHz.
Table 1 shows the divide ratio applied to the high-fre-
quency oscillator output based on the value of
SYNCIN_DIV.
To start operating the DACs and DAMPs, the following
procedural steps should be followed:
1) Set both DAC inputs to code 512.
2) Enable the SYNCIN clock by setting an appropriate
value for SYNCIN_DIV.
3) Wait 100s. Clear the SHDNR and SHDNL bits.
4) Wait 100s.
One or both DAMPs can be shut down at any time by
setting the corresponding SHDN bit. If both DAMPs are
shut down, the firmware should disable the SYNCIN
signal.
The DAMP FAULT bit goes high for at least 500ns fol-
lowing a thermal shutdown or current-limit event. It
stays low in shutdown and is glitch-free during power-
up. FAULT interrupts the microcontroller if enabled.
Alternatively, the firmware can poll the bit periodically to
detect faults of the type previously described.
DAC1 and DAC2 Buffers
While the MAXQ8913 contains power drivers for the
actuator, the positive terminal of each differential DAC
output pair is buffered and available as an output pin.
This feature is intended primarily for test, and no signifi-
cant load should be added to the DAC1 and DAC2
pins. The specifications for these pins are not yet deter-
mined, except for the no-load output voltage, which is
expected to be between GND and 2.5V.
DAC3 and DAC4
DAC3 and DAC4 are single-ended DACs. Their outputs
are intended for driving the positive terminal (through a
resistor) of single-supply op amps to force the virtual
GND to a value that allows the op amp to operate
below and above the virtual ground DC value.
Operated in this fashion, the DACs can also serve as
offset cancellation devices as necessary.
SINK1 and SINK2
Popular optical-image stabilization implementations
include the use of Hall-effect elements for position feed-
back. Hall-effect elements require a current to flow
through two of its terminals for proper operation. The
device includes two current sinks intended to drive
these elements. The current sinks are programmable
between 0 and 15.94mA with 62.5mA resolution
through an 8-bit code. Code 0 turns them off.
When operating Hall-effect elements from 3V, the maxi-
mum achievable current is given by (3V - 0.5V)/RHALL,
where 0.5V is the minimum voltage value at the input of
the current sink. For example, if RHALL = 250
Ω, the
maximum current is 10mA.
If higher currents are desirable, the user must provide a
larger supply voltage to the Hall-effect element. In this
case, care must be exercised so that the output nodes
of the Hall-effect element do not exceed VAVDD.
Exceeding VAVDD could cause the input-protection
diodes of the op-amp terminals to begin conduction
and waste power when the device is in sleep mode. If
supplying a voltage larger than VAVDD to the Hall-effect
element, a switchable supply is recommended to avoid
the leakage path identified above.
16-Bit, Mixed-Signal Microcontroller with Op Amps,
ADC, and DACs for All-in-One Servo Loop Control
20
______________________________________________________________________________________
SYNCIN_DIV
HF DIVIDED BY
0 (default)
SYNCIN clock off
1
2
3
4
Table 1. SYNCIN Divisor vs. SYNCIN_DIV
Value
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAXQ8913EWG-T&R+ | 制造商:Maxim Integrated Products 功能描述:MAXQ8913 IMAGE STABILIZER WLF T&R - Gel-pak, waffle pack, wafer, diced wafer on film |
| MAXQ8913X-0000+ | 功能描述:16位微控制器 - MCU 16-Bit Mxd Sgnl MCU w/Op Amp ADC & DAC RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MAXQ-H2000 | 功能描述:子卡和OEM板 HDR BRD FOR MAX2000-RAX RoHS:否 制造商:BeagleBoard by CircuitCo 產品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
| MAXQ-JTAG | 功能描述:JTAG調試器 JTAG FOR PRGRAMNG/ DEBUGGING MAXQ RoHS:否 制造商:Olimex Ltd. 產品:JTAG In-Circuit Debuggers 工具用于評估:MSP430 Flash MCUs 用于:MSP430 Kick Start, MSPGCC 核心:MSP430 接口類型:JTAG, USB 工作電源電壓:12 V |
| MAXQ-JTAG-USB | 功能描述:JTAG調試器 JTAG FOR PRGRAMNG/ DEBUGGING MAXQ RoHS:否 制造商:Olimex Ltd. 產品:JTAG In-Circuit Debuggers 工具用于評估:MSP430 Flash MCUs 用于:MSP430 Kick Start, MSPGCC 核心:MSP430 接口類型:JTAG, USB 工作電源電壓:12 V |
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