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參數(shù)資料
| 型號： | MAXQ3212-EMX+ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, EEPROM, 3.58 MHz, RISC MICROCONTROLLER, PDIP24 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-001AF, DIP-24 |
| 文件頁數(shù)： | 11/25頁 |
| 文件大?。?/td> | 319K |
| 代理商： | MAXQ3212-EMX+ |
MAXQ3212
Microcontroller with Analog Comparator
and LED Driver
____________________________________________________________________
19
Programmable Timer
The microcontroller incorporates one 16-bit program-
mable timer/counter. The type 2 timer (timer 2) can be
used in counter/timer/capture/compare/PWM functions,
allowing precise control of internal and external events.
It also supports optional single-shot, external gating,
and polarity control options.
Timer 2
The timer 2 peripheral includes the following:
16-bit auto-reload timer/counter
16-bit capture
16-bit counter
8-bit capture and 8-bit timer
8-bit counter and 8-bit timer
Wake-Up Timer
The microcontroller includes a simple 20-bit wake-up
timer that can be used to measure long intervals. The
user-selectable timer period can be used to generate a
long-period interrupt or wake the device out of stop
mode. The timer can be clocked from either the cur-
rently active system clock or the 8kHz ring oscillator. In
stop mode, only the 8kHz ring oscillator is available as
the wake-up timer clock source. As an interrupt, the
feature increases overall performance by reducing
many shorter timer interruptions to a single interrupt to
measure the same long period. When used in stop
mode, it provides the energy savings of the lowest
power mode with periodic wake-up ability.
Watchdog Timer
An internal watchdog timer greatly increases system
reliability. The timer resets the device if software execu-
tion is disturbed. The watchdog timer is a free-running
counter designed to be periodically reset by the appli-
cation software. If software is operating correctly, the
counter is periodically reset and never reaches its max-
imum count. However, if software operation is interrupt-
ed, the timer does not reset, triggering a system reset
and optionally a watchdog timer interrupt. This protects
the system against electrical noise or electrostatic dis-
charge (ESD) upsets that could cause uncontrolled
processor operation. The internal watchdog timer is an
upgrade to older designs with external watchdog
devices, reducing system cost and simultaneously
increasing reliability.
The watchdog timer is controlled through bits in the
WDCN register. Its timeout period can be set to one of
four programmable intervals ranging from 212 to 221
system clocks in its default clock mode, allowing flexi-
bility to support different types of applications. The
interrupt occurs 512 system clocks before the reset,
allowing the system to execute an interrupt and place
the system in a known, safe state before the device
performs a total system reset. At 3.58MHz, watchdog
timeout periods can be programmed from 1.14ms to
149.94s, depending on the system clock mode.
Analog Comparator
The analog comparator is a 1-bit, analog-to-digital
comparator. The comparator input can be connected to
a wide range of peripherals, including chemical sen-
sors and motion or proximity detectors, or any other
appropriate analog input. The comparator measures
the analog input against either an external voltage ref-
erence or the internal +2.5V reference. When the level
on the comparator input, CMPI, rises above the select-
ed voltage reference, the CMO bit in the CMPC register
is changed to the desired level. The device then
responds by asserting an external signal and/or activat-
ing an internal interrupt request. The polarity of the
external signal asserted is programmable. When not in
use, the pins associated with the comparator are
usable as general-purpose I/O.
In addition, the +2.5V reference is configurable to be
output on the VREF pin. This provides an absolute volt-
age reference for use with data converters or other pre-
cision devices.
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