參數(shù)資料
型號(hào): MAXQ3212-EMX+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, EEPROM, 3.58 MHz, RISC MICROCONTROLLER, PDIP24
封裝: 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-001AF, DIP-24
文件頁數(shù): 10/25頁
文件大?。?/td> 319K
代理商: MAXQ3212-EMX+
MAXQ3212
Microcontroller with Analog Comparator
and LED Driver
18
____________________________________________________________________
Watchdog Timer Reset
The watchdog timer functions are described in the
MAXQ Family User’s Guide. Software can determine if
a reset is caused by a watchdog timeout by checking
the Watchdog Timer Reset Flag (WTRF) in the WDCN
register. Execution resumes at location 8000h following
a watchdog timer reset.
External System Reset
Asserting the external RESET pin low causes the
device to enter the reset state. The external reset func-
tions as described in the
MAXQ Family User’s Guide.
Execution resumes at location 8000h after the RESET
pin is released. The external system reset function is
enabled by default on a power-on reset, but can be
disabled and the pin used as general-purpose I/O by
setting the Reset Pin Disable (RSTD) bit. The system
designer is cautioned not to disable the reset pin early
in the software as it could disable future JTAG access
and/or bootloader capability.
I/O Ports
The microcontroller uses a form of Type D bidirectional
I/O pins described in the
MAXQ Family User’s Guide.
Each port has eight independent, general-purpose I/O
pins and three configure/control registers. Many pins
support alternate functions such as timers or interrupts,
which are enabled, controlled, and monitored by dedi-
cated peripheral registers. Using the alternate function
automatically converts the pin to that function. The I/O
pins on this device employ an optional “keeper” latch
that helps to maintain the input pin state in the absence
of external drive sources.
Port 0.7 is a special pin with a stronger pulldown capa-
bility to drive devices such as LEDs. It operates and is
configured the same as other pins.
Type D port pins have Schmitt Trigger receivers and
full CMOS output drivers, and can support special
functions. The pin is either tri-stated or weak pullup
when defined as an input, dependent on the state of
the corresponding bit in the output register. One pin of
the device has interrupt capability.
MAXQ3212
PD.x
SF DIRECTION
SF ENABLE
MUX
PO.x
VDDIO
SF OUTPUT
VDD
WEAK
I/O PAD
PIN.x
INTERRUPT
FLAG
PI.x OR SF INPUT
EIES.x
DETECT
CIRCUIT
Figure 3. Type D Port Pin Schematic
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