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參數(shù)資料
| 型號： | MAX9492 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Multiple-Output Clock Generator with Spread Spectrum |
| 中文描述： | 多輸出時鐘發(fā)生器，帶有擴頻功能 |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 276K |
| 代理商： | MAX9492 |
MAX9492
V
DDA
V
DD
V
DD
V
DD
CLK1
CLK6
X1
X2
SDA
SCL
SA0
SA1
SSCAGND
GND
+3.3V
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
10pF
SERIAL
INTERFACE
CLOCK
OUTPUTS
25MHz
10pF
+3.3V
Pin Configuration
Typical Operating Circuit
15
14
13
12
C
C
V
D
C
11
C
8
7
6
9
10
SDA
GND
CLK1
CLK2
SCL
19
18
17
16
SA0
SA1
SSC
V
DD
20
GND
1
2
3
4
G
X
X
V
D
5
V
D
MAX9492
TOP VIEW
THIN QFN
EXPOSED PADDLE (GND)
Setting the Clock Frequencies
Each CLK_ output has an associated control register.
The contents of the registers determine the frequencies
of their associated outputs. Table 3 provides the fre-
quency mapping for the registers. CLK1 only responds
to the 25MHz and high-impedance settings in Table 3.
For example, writing 03h to the CLK1 control register
does not change CLK1
’
s output frequency to
133.3MHz. The CLK1 output continues to output a
buffered reference clock signal.
Spread-Spectrum Control
The MAX9492 features spread-spectrum output struc-
tures to spread radiated emissions over the frequency
band. A programmable triangle-wave generator injects
an offset element into the master oscillator to dither its
output by -1.25% or -2.5%. The dither is controlled by
the SSC input. When SSC is low, spread spectrum is
disabled. When SSC is floating, spread spectrum is set
to -1.25%. When SSC is high, spread spectrum is set
to -2.5%.
Power Supply
The MAX9492 uses a 3.0V to 3.6V power supply con-
nected to V
DD
, and 3.0V to 3.6V connected to V
DDA
.
Bypass V
DDA
and V
DD
at the device with a 0.1μF
capacitor. Additionally, use bulk bypass capacitors of
10μF where power enters the circuit board.
Applications Information
Board Layout Considerations
As with all high-frequency devices, board layout is criti-
cal to proper operation. Place the crystal as close as
possible to X1 and X2, and minimize parasitic capaci-
tance around the crystal leads. Ensure that the exposed
pad makes good contact with GND.
Chip Information
PROCESS: BiCMOS
M
Multiple-Output Clock Generator
with Spread Spectrum
10
______________________________________________________________________________________
BITS IN CLKn
REGISTERS
OUTPUT FREQUENCY
(MHz)
00
01
02
03
04
05
06
07
08
0F
Logic-Low
133.3
125
83.3
66.6
62.5
50
33.3
25
High Impedance
Table 3. Output Frequency Selection for
CLK1
–
CLK6
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| MAX9492ETP | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MAX9492ETP+ | 功能描述:鎖相環(huán) - PLL Multiple-Output Clock Generator with Spread Spectrum RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MAX9492ETP+T | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MAX9492ETP-T | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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