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參數(shù)資料
| 型號(hào)： | MAX5950ETJ+ |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 14/28頁 |
| 文件大?。?/td> | 552K |
| 描述： | IC PWM CTRL HOT-SW 12V 32TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | 通用型，PCI Express? |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | 8 V ~ 16 V，±5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-TQFN-EP（5x5） |
| 包裝： | 管件 |
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12V PWM Controller with Hot-Swap
14 ______________________________________________________________________________________
PWREN, PGI
The active-low power-enable input, PWREN, is internally
pulled high. Pull PWREN low for at least 10ms for the
hot-swap to commence. Connect PGI to the PGOOD
outputs of the DC-DC converters. PGI is used to indi-
cate that all the output voltages of the DC-DC converters
are in range. PGI blanks for 165ms after the hot-swap is
completed to allow for the DC-DC converters to startup.
PWM Controller
PWM UVLO
V
PWM_IN
must exceed the default PWM UVLO thresh-
old (7V typ) before any PWM operation can commence.
The UVLO circuitry keeps the MOSFET drivers, oscilla-
tor, and all the internal circuitry shut down to reduce
current consumption.
Override the internal PWM UVLO divider by connecting
an external resistive divider from IN to PUVLO to AGND.
The PUVLO threshold is 1.220V with 120mV hysteresis.
Digital Soft-Start
The MAX5950 soft-start feature allows the load voltage
to ramp up in a controlled manner, eliminating output-
voltage overshoot. Soft-start begins after V
PWM_IN
exceeds the UVLO threshold. The soft-start circuitry
gradually ramps up the reference voltage. This controls
the rate of rise of the output voltage and reduces input
surge currents during startup. The soft-start duration is
1024 clock cycles. The output voltage is incremented
through 128 equal steps. The output reaches regulation
when soft-start is completed, regardless of output
capacitance and load.
Internal Linear Regulator (REG)
REG is the output terminal of a 5V LDO, which is pow-
ered from PWM_IN and provides power to the IC.
Bypass REG to GND with a 2.2礔 ceramic capacitor.
Place the capacitor physically close to the MAX5950 to
provide good bypassing. REG is intended for powering
only the internal circuitry and should not be used to
supply power to external loads.
Low-Side MOSFET Driver Supply (DREG)
DREG is the supply input for the low-side MOSFET dri-
ver. Connect DREG to REG externally. Adding an RC fil-
ter (5& and 2.2礔 ceramic capacitor) from REG to DREG
filters out the high-peak currents of the MOSFET drivers.
High-Side MOSFET Driver Supply (BST)
BST supplies the power for the high-side MOSFET dri-
vers. Connect the bootstrap diode from BST to DREG
(anode at DREG and cathode at BST). Connect a boot-
strap 1礔 ceramic capacitor between BST and LX.
MOSFET Gate Drivers (DH, DL)
The high-side (DH) and low-side (DL) drivers drive the
gates of the external n-channel MOSFETs. The drivers
2A peak source-and-sink current capability provides
ample drive to assure fast rise and fall times of the
switching MOSFETs. Short rise and fall times minimize
switching losses. For low-output voltage applications
where the duty cycle is less than 50%, choose a high-
side MOSFET (Q2) with a moderate R
DS(ON)
. Choose a
low-side MOSFET (Q1) with a very low R
DS(ON)
.
The gate-driver circuitry also provides a break-before-
make time (25ns typ) to prevent shoot-through currents
during transition.
Oscillator/Synchronization Input (SYNCIN)/
Synchronization Output (SYNCOUT)
Use an external resistor at RT to program the MAX5950
switching frequency from 100kHz to 1MHz.
Choose the appropriate resistor at RT to calculate the
desired output switching frequency (f
SW
):
f
SW
(Hz) = (5 x 10
10
) / R
RT
(&)
Connect an external clock (SYNCOUT from another
MAX5950/MAX5951) at SYNCIN for external clock syn-
chronization. For proper synchronization, the external fre-
quency must be at least 20% higher than the frequency
programmed through the RT input. If SYNCIN is 50% duty
cycle, SYNCOUT is shifted by 180? allowing the reduc-
tion of the DC-DC converter input bypass capacitor.
SYNCOUT is a synchronization signal that is used to
drive the SYNCIN of a second MAX5950/MAX5951.
Tracking (STARTUP)
The STARTUP input in conjunction with digital soft-start
provides simple ratiometric tracking. When using multi-
ple MAX5950s/MAX5951s, in addition to connecting
SYNCIN and SYNCOUT signals appropriately, connect
the STARTUP of all the devices together. STARTUP syn-
chonizes the soft-start of all the devices references, and
hence their respective output voltages track ratiometri-
cally. See Figure 1 and the Typical 0perating Circuits.
The STARTUP input has an internal 10礎(chǔ) pullup cur-
rent, but can be driven by external logic. When using
multiple converters, connect the STARTUP of all the
devices together.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX5950ETJ+ | 功能描述:電壓模式 PWM 控制器 12V PWM Controller w/Hot-Swap RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| MAX5950ETJ+T | 功能描述:電壓模式 PWM 控制器 12V PWM Controller w/Hot-Swap RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| MAX5950ETJ-T | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| MAX5950EVKIT | 制造商:Maxim Integrated Products 功能描述:12V PWM CONTROLLER WITH HOT-SWAP - Rail/Tube |
| MAX5951ETJ | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
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