12V PWM Controller with Hot-Swap
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Pin Description
PIN
NAME
FUNCTION
1
PWM_IN
PWM Controller Input Voltage
2
PUVLO
PWM UVLO Divider Center Point. Use an external divider to override the internal PWM UVLO divider.
The rising threshold is set to 1.220V with 122mV hysteresis. Leave PUVLO unconnected for the
default PWM UVLO.
3
HSENSE
Hot-Swap Negative-Sense Input. Connect HSENSE close to the hot-swap FET source.
4
GATE
Hot-Swap Gate-Drive Output. Connect GATE to the gate of an external n-channel MOSFET.
5
IN
Supply Input Connection. Connect to an external voltage source from 8V to 16V.
For 5V input application, connect IN = PWM_IN = REG to a 5V ?0% source. Connect an external
divider from IN to PUVLO to AGND to lower the startup voltage. Connect an external divider from IN to
HUVLO to AGND to override the hot-swap undervoltage lockout threshold.
6
HUVLO
Center Point of the Hot-Swap UVLO Divider. Use an external divider to override the internal hot-swap
UVLO divider. The rising threshold is 1.220V with 120mV hysteresis. Leave HUVLO unconnected for
the default hot-swap UVLO.
7
PWREN
Active-Low Power-Enable Input. Pull PWREN low for at least 10ms for the hot-swap to commence.
Active-low PWREN is internally pulled high.
8
PWRFLT
Active-Low Power-Fault Output. This open-drain output latches low when a hot-swap or PWM fault
occurs. Pulse PWREN high, then low or cycle the power supply to clear the latch.
9
MPWRGD
Active-Low Module Power-Good Output. This open-drain output goes low 165ms after the hot-swap
is completed. MPWRGD indicates that both hot-swap and downstream DC-DC switchers are
operating properly.
10
PGI
Power-Good Input. Connect PGI to the PGOOD outputs of the DC-DC switchers. PGI is used to
indicate that all the output voltages of the DC-DC switchers are in range. PGI blanks for 165ms after
the hot-swap is completed to allow for DC-DC startup. The hot-swap circuit shuts down if PGI is not
pulled high before the blanking period ends.
11
DCENO
DC-DC Enable Output. This output goes high once the hot-swap is completed. Use DCENO to enable
downstream DC-DC switchers.
12
DCENI
DC-DC Enable Input. DCENI must be above V
THRESH
for the PWM controller to start. Connect to REG
if not used.
13
THRESH
DC-DC Enable Input Threshold Set. Connect a resistive divider from REG to THRESH to AGND to set
the DCENI threshold. Connect to ground for a default threshold of 1.220V.
14
AGND
Analog Ground Connection. Solder the exposed pad to a large AGND plane. Connect AGND and
PGND together at one point near the input bypass capacitor return terminal.
15
SYNCOUT
Synchronization Output. SYNCOUT is a synchronization signal to drive the SYNCIN of a second
MAX5950/MAX5951, if used. Leave SYNCOUT unconnected when not used.
16
SYNCIN
Synchronization Input. SYNCIN accepts the SYNCOUT from another MAX5950/MAX5951 and shifts
switching by 180? allowing the reduction of the input bypass capacitors. When used, drive with a
frequency at least 20% higher than the frequency programmed through the RT pin. If phase
staggering is desired, use 50% duty cycle. Connect SYNCIN to AGND when not used.
17
RT
Oscillator Timing Resistor Connection. Connect a 500k& to 50k& resistor from RT to AGND to
program the switching frequency from 100kHz to 1MHz.
18
STARTUP
Startup Input. STARTUP coordinates simultaneous soft-start for multiple converters. See the Tracking
(STARTUP) section.
19
PGOOD
Power-Good Output. PGOOD output goes high when SENSE is above V
REF
and STARTUP is high.
20
COMP
Error Amplifier Output. Connect COMP to the compensation feedback network.