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參數(shù)資料
| 型號： | MAX5891EGK+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT LVDS 600MSPS 68-QFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時間： | 11ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 301mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 68-QFN 裸露焊盤（10x10） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 600M |
planes in the PCB design to ensure the highest dynam-
ic performance of the DAC. Connect the MAX5891
exposed paddle to the common connection point of
DGND, AGND, and CGND. Vias connect the top land
pattern to internal or external copper planes. Use as
many vias as possible to the ground plane to minimize
inductance. The vias should have a diameter greater
than 0.3mm.
Static Performance Parameter
Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from a line drawn between the
end points of the transfer function, once offset and gain
errors have been nullified. For a DAC, the deviations
are measured at every individual step.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an
actual step height and the ideal value of 1 LSB.
Offset Error
The offset error is the difference between the ideal and
the actual offset current. For a DAC, the offset point is
the average value at the output for the two midscale
digital input codes with respect to the full scale of the
DAC. This error affects all codes by the same amount.
Gain Error
A gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve,
after nullifying the offset error. This error alters the slope
of the transfer function and corresponds to the same
percentage error in each step.
Settling Time
The settling time is the amount of time required from the
start of a transition until the DAC output settles its new
output value to within the converter’s specified accuracy.
Glitch Impulse
A glitch is generated when a DAC switches between
two codes. The largest glitch is usually generated
around the midscale transition, when the input pattern
transitions from 011...111 to 100...000. The glitch
impulse is found by integrating the voltage of the glitch
at the midscale transition over time. The glitch impluse
is usually specified in pVs.
Dynamic Performance Parameter
Definitions
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of the
full-scale analog output (RMS value) to the RMS quanti-
zation error (residual error). The ideal, theoretical maxi-
mum can be derived from the DAC’s resolution (N bits):
SNRdB = 6.02dB x N + 1.76dB
However, noise sources such as thermal noise, refer-
ence noise, clock jitter, etc., affect the ideal reading;
therefore, SNR is computed by taking the ratio of the
RMS signal to the RMS noise, which includes all spec-
tral components minus the fundamental, the first four
harmonics, and the DC offset.
Noise Spectral Density
The DAC output noise floor is the sum of the quantiza-
tion noise and the output amplifier noise (thermal and
shot noise). Noise spectral density is the noise power in
1Hz bandwidth, specified in dBFS/Hz.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of RMS amplitude of the carrier
frequency (maximum signal components) to the RMS
value of their next-largest distortion component. SFDR is
usually measured in dBc and with respect to the carrier
frequency amplitude or in dBFS with respect to the
DAC’s full-scale range. Depending on its test condition,
SFDR is observed within a predefined window or to
Nyquist.
Two-Tone Intermodulation Distortion (IMD)
The two-tone IMD is the ratio expressed in dBc (or
dBFS) of the worst 3rd-order IMD differential product to
either output tone. The two-tone IMD performance of
the MAX5891 is tested with the two individual output
tone levels set to at least -6.5dBFS.
Adjacent Channel Leakage Power Ratio (ACLR)
Commonly used in combination with wideband code-
division multiple-access (WCDMA), ACLR reflects the
leakage power ratio in dB between the measured
power within a channel relative to its adjacent channel.
ACLR provides a quantifiable method of determining
out-of-band spectral energy and its influence on an
adjacent channel when a bandwidth-limited RF signal
passes through a nonlinear device.
MAX5891
16-Bit, 600Msps, High-Dynamic-Performance
DAC with LVDS Inputs
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| MAX5891EVKIT | 功能描述:數(shù)模轉(zhuǎn)換器- DAC MAX5889/MAX5890/MAX5891 Evaluation Kits RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5891EVKIT# | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5893EGK+D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch 500Msps DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5893EGK+TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2Ch 500Msps DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5893EGK-D | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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