參數(shù)資料
型號(hào): MAX5891EGK+TD
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 16/16頁(yè)
文件大小: 0K
描述: IC DAC 16BIT LVDS 600MSPS 68-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時(shí)間: 11ns
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 301mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 68-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 68-QFN 裸露焊盤(pán)(10x10)
包裝: 帶卷 (TR)
輸出數(shù)目和類(lèi)型: 2 電流,單極
采樣率(每秒): 600M
Detailed Description
Architecture
The MAX5891 high-performance, 16-bit, current-steer-
ing DAC (see the Functional Diagram) operates with
DAC update rates up to 600Msps. The current-steering
array generates differential full-scale currents in the
2mA to 20mA range. An internal current-switching net-
work, in combination with external 50
Ω termination
resistors, converts the differential output currents into a
differential output voltage with a 0.1V to 1V peak-to-
peak output voltage range. The analog outputs have a
-1.0V to +1.1V voltage compliance. For applications
requiring high dynamic performance, use the differen-
tial output configuration and limit the output voltage
swing to ±0.5V at each output. An integrated 1.2V
bandgap reference, control amplifier, and user-selec-
table external resistor determine the data converter’s
full-scale output range.
Reference Architecture and Operation
The MAX5891 operates with the internal 1.2V bandgap
reference or an external reference voltage source.
REFIO serves as the input for an external, low-imped-
ance reference source or as a reference output when
the DAC operates in internal reference mode. For sta-
ble operation with the internal reference, bypass REFIO
to AGND with a 0.1F capacitor. The REFIO output
resistance is 10k
Ω. Buffer REFIO with a high-input-
impedance amplifier when using it as a reference
source for external circuitry.
The MAX5891’s reference circuit (Figure 1) employs a
control amplifier to regulate the full-scale current,
IOUTFS, for the differential current outputs of the DAC.
Calculate the output current as follows:
where IOUTFS is the full-scale output current of the
DAC. RSET (located between FSADJ and DACREF)
determines the amplifier’s full-scale output current for
the DAC. See Table 1 for a matrix of different IOUTFS
and RSET selections.
Analog Outputs (OUTP, OUTN)
The complementary current outputs (OUTP, OUTN) can
be connected in a single-ended or differential configu-
ration. A load resistor converts these two output cur-
rents into complementary single-ended output
voltages. A transformer or a differential amplifier con-
verts the differential voltage existing between OUTP
and OUTN to a single-ended voltage. When not using a
transformer, terminate each output with a 25
Ω resistor
to ground and a 50
Ω resistor between the outputs.
To generate a single-ended output, select OUTP as the
output and connect OUTN to AGND. Figure 2 shows a
simplified diagram of the internal output structure of the
MAX5891.
I
V
R
OUTFS
REFIO
SET
×
32
1
2
16
MAX5891
16-Bit, 600Msps, High-Dynamic-Performance
DAC with LVDS Inputs
_______________________________________________________________________________________
9
RSET (
Ω)
FULL-SCALE CURRENT
IOUTFS (mA)
CALCULATED
1% EIA STD
2
19.2k
19.1k
5
7.68k
7.5k
10
3.84k
3.83k
15
2.56k
2.55k
20
1.92k
1.91k
Table 1. IOUTFS and RSET Selection Matrix
Based on a Typical 1.200V Reference
Voltage
OUTP
OUTN
1.2V
REFERENCE
CURRENT-SOURCE
ARRAY DAC
REFIO
FSADJ
RSET
IREF
10k
Ω
DACREF
0.1
μF
IREF = VREFIO / RSET
Figure 1. Reference Architecture, Internal Reference
Configuration
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