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參數(shù)資料
| 型號(hào)： | MAX5109EEE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 17/17頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT DUAL NV 16-QSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 6µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-QSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，單極 |
| 采樣率（每秒）： | * |
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Detailed Description
The MAX5109 8-bit DACs feature internal, nonvolatile
registers that store the DAC states for initialization dur-
ing power-up. This device consists of resistor-string
DACs, rail-to-rail output buffers, a shift register, power-
on reset (POR) circuitry, and volatile and nonvolatile
memory registers (Figure 1). The shift register decodes
the control and address bits, routing the data to the
proper registers. Writing data to a selected volatile reg-
ister immediately updates the DAC outputs.
The volatile registers retain data as long as the device
is powered. Removing power clears the volatile regis-
ters. The nonvolatile registers retain data even after
power is removed. On startup, when power is first
applied, data from the nonvolatile registers is trans-
ferred to the volatile registers to automatically initialize
the device. Read data from the nonvolatile or volatile
registers using the 2-wire serial interface.
DAC Operation
The MAX5109 uses a DAC matrix decoding architec-
ture that saves power. A resistor string divides the dif-
ference between the external reference voltages,
VREFH_ and VREFL_. Row and column decoders select
the appropriate tap from the resistor string, providing
the equivalent analog voltage. The resistor string pre-
sents a code-independent input impedance to the ref-
erence and guarantees a monotonic output. Figure 2
shows a simplified diagram of one DAC.
Output Buffer Amplifiers
The MAX5109 analog outputs are internally buffered by
precision unity-gain amplifiers. The outputs swing from
GND to VDD with a VREFL_-to-VREFH_ output transition.
The amplifier outputs typically settle to ±0.5 LSB in 8s
when loaded with 5k
in parallel with 100pF.
MAX5109
Nonvolatile, Dual, 8-Bit DACs with 2-Wire Serial
Interface
_______________________________________________________________________________________
9
DAC0
NONVOLATILE
REGISTER
DAC1
NONVOLATILE
REGISTER
REFL0
OUT0
9
14
15
8
16
13
12
11
5
6
7
1
2
3
OUT1
SCL
GND
VDD
SDA
A3
A2
A1
2-WIRE
SERIAL
INTERFACE/
CONTROL
MUTE
REFH0
REFL1
REFH1
DAC0
VOLATILE
REGISTER
DAC1
VOLATILE
REGISTER
MAX5109
DAC0
DAC1
4
A0
POR
Figure 1. MAX5109 Functional Diagram
REFH_
REFL_
R1
R15
R16
R255
R0
D7
D6
D5
D4
DAC
MSB
DECODER
D3
D0
D2
D1
LSB DECODER
Figure 2. DAC Simplified Circuit Diagram
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