SPI/I2C UART with 128-Word FIFOs Pin Configurations Pin Descriptions TQFN (3.5mm" />
參數(shù)資料
型號(hào): MAX3107EAG+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 4/52頁(yè)
文件大小: 0K
描述: IC UART SPI/I2C 128 FIFO 24SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
特點(diǎn): 內(nèi)部振蕩器
通道數(shù): 4,QUART
FIFO's: 128 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.35 V ~ 3.6 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 24-SSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MAX3107EAG+TDKR
SPI/I2C UART with 128-Word FIFOs
Pin Configurations
Pin Descriptions
TQFN
(3.5mm × 3.5mm)
MAX3107
19
20
21
22
1
2
3
4
5
6
18 17
16 15 14 13
23
24
12
11
10
9
8
7
TX
XOUT
VEXT
XIN
VA
+
V 18
I2C/SPI
LDOEN
DOUT/SDA
SCLK/SCL
CS/A0
RX
GPIO3
GPIO2
GPIO1
AGND
*EP
*CONNECT EP TO AGND.
GPIO0
VL
DGND
RST
DIN/A1
IRQ
CTS
TOP VIEW
24
23
22
21
20
19
17
1
2
3
4
5
6
8
XOUT
VEXT
TX
RX
V18
VA
AGND
XIN
MAX3107
CTS
GPIO2
SCLK/SCL
LDOEN
18
7
GPIO3
DOUT/SDA
15
10
GPIO0
DIN/A1
16
9
GPIO1
CS/A0
13
12
VL
RST
14
11
DGND
IRQ
I2C/SPI
SSOP
+
RTS/CLKOUT
PIN
NAME
FUNCTION
TQFN-EP
SSOP
1
4
V18
Internal 1.8V LDO Output and 1.8V Logic Supply Input. Bypass V18 with a 1FF
ceramic capacitor to DGND. Keep V18 powered in shutdown mode.
2
5
I2C/SPI
SPI or Active-Low I2C Selector Input. Drive I2C/SPI high to enable SPI. Drive I2C/SPI
low to enable I2C.
3
6
LDOEN
LDO Enable Input. Drive LDOEN high to enable the internal 1.8V LDO. Drive LDOEN
low to disable the internal LDO. Power V18 with an external 1.8V supply when
LDOEN is low.
4
7
DOUT/SDA
Serial-Data Output. When I2C/SPI is high, DOUT/SDA functions as the DOUT SPI
serial-data output. When I2C/SPI is low, DOUT/SDA functions as the SDA I2C serial-
data input/output.
5
8
SCLK/SCL
Serial-Clock Input. When I2C/SPI is high, SCLK/SCL functions as the SCLK SPI serial-
clock input (up to 26MHz). When I2C/SPI is low, SCLK/SCL functions as the SCL I2C
serial-clock input (up to 400kHz).
6
9
CS/A0
Active-Low Chip-Select and Address 0 Input. When I2C/SPI is high, CS/A0 functions
as the CS SPI active-low chip select. When I2C/SPI is low, CS/A0 functions as the A0
I2C device address programming input. Connect CS/A0 to DGND or VL.
12
Maxim Integrated
MAX3107
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