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參數(shù)資料
| 型號： | M6MGT166S2BWG |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-CSP |
| 中文描述： | 3.3的CMOS只快閃記憶體 |
| 文件頁數(shù)： | 28/30頁 |
| 文件大?。?/td> | 253K |
| 代理商： | M6MGT166S2BWG |
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Nov 1999 , Rev.2.3
MITSUBISHI LSIs
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM
Stacked-CSP (Chip Scale Package)
M6MGB/T166S2BWG
28
Write cycle (S-LB#,S-UB# control mode)
Note 3: Hatching indicates the state is "don't care".
Note 4: A Write occurs during S-CE1# low, S-CE2 high overlaps S-LB# and/or S-UB# low and S-WE# low.
Note 5: When the falling edge of S-WE# is simultaneously or prior to the falling edge of S-LB# and/or S-UB# or the falling edge of
S-CE1# or rising edge of S-CE2, the outputs are maintained in the high impedance state.
Note 6: Don't apply inverted phase signal externally when DQ pin is in output mode.
t
h
(D)
t
su
(D)
DQ
0~15
t
su
(LB) or
t
su
(UB)
t
rec
(W)
t
su
(A)
t
CW
A
0~16
S-WE#
DATA IN
STABLE
(Note3)
(Note3)
(Note4)
(Note5)
(Note3)
(Note3)
S-CE1#
S-LB#,
S-UB#
(Note3)
(Note3)
S-CE2
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M6MGT166S4BWG | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY |
| M6MGT32BS4WG | 制造商:-- 功能描述:ELECTRONIC COMPONENT |
| M6MGT331S4BKT | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:33,554,432-BIT (2,097,152 - WORD BY 16-BIT/4,194,304-WORD BY 8-BIT) CMOS 3.3V-ONLY FLASH MEMORY & 4,194,304-BIT (262,144-WORD BY 16-BIT/524,288-WORD B |
| M6MGT331S8AKT | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:33,554,432-BIT (2,097,152 - WORD BY 16-BIT /4,194,304-WORD BY 8-BIT) CMOS FLASH MEMORY & 8,388,608-BIT (524,288-WORD BY 16-BIT /1,048,576-WORD BY 8-BI |
| M6MGT331S8BKT | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:33,554,432-BIT (2,097,152 - WORD BY 16-BIT /4,194,304-WORD BY 8-BIT) CMOS FLASH MEMORY & 8,388,608-BIT (524,288-WORD BY 16-BIT /1,048,576-WORD BY 8-BI |
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