參數(shù)資料
型號： M68HC711D0CFB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 2 MHz, MICROCONTROLLER, PQFP44
封裝： QFP-44
文件頁數(shù)： 97/124頁
文件大小： 5398K
代理商： M68HC711D0CFB
SERIAL COMMUNICATIONS INTERFACE
7-8
TECHNICAL DATA
NF — Noise Error Flag
NF is set if majority sample logic detects anything other than a unanimous decision.
Clear NF by reading SCSR with NF set and then reading SCDR.
0 = Unanimous decision
1 = Noise detected
FE — Framing Error
FE is set when a 0 is detected where a stop bit was expected. Clear the FE flag by
reading SCSR with FE set and then reading SCDR.
0 = Stop bit detected
1 = 0 detected
7.6.5 Baud Rate Register (BAUD)
Use this register to select different baud rates for the SCI system. The SCP[1:0] bits
function as a prescaler for the SCR[2:0] bits. Together, these five bits provide multiple
baud rate combinations for a given crystal frequency. Normally, this register is written
once during initialization. The prescaler is set to its fastest rate by default out of reset,
and can be changed at any time. Refer to Table 7-1 and Table 7-2 for normal baud
rate selections.
TCLR — Clear Baud Rate Counters (Test)
RCKB — SCI Baud Rate Clock Check (Test)
SCP1, SCP0 — SCI Baud Rate Prescaler Selects
These two bits select a prescale factor for the SCI baud rate generator that determines
the highest possible baud rate.
SCR[2:0] — SCI Baud Rate Selects
These three bits select receiver and transmitter bit rate based on output from baud rate
prescaler stage.
BAUD — Baud Rate
$002B
Bit 7
654321
Bit 0
TCLR
0
SCP1
SCP0
RCKB
SCR2
SCR1
SCR0
RESET:
00000
U
Table 7-1 Baud Rate Prescale Selects
SCP[1:0]
Divide
Crystal Frequency in MHz
Internal Clock
By
4.0 MHz
(Baud)
8.0 MHz
(Baud)
10.0 MHz
(Baud)
12.0 MHz
(Baud)
0 0
1
62.50 K
125.0 K
156.25 K
187.5 K
0 1
3
20.83 K
41.67 K
52.08 K
62.5 K
1 0
4
15.625 K
31.25 K
38.4 K
46.88 K
1 1
13
4800
9600
12.02 K
14.42 K
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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