參數資料
型號: M66290AGP
廠商: Mitsubishi Electric Corporation
英文描述: USB DEVICE CONTROLLER
中文描述: USB設備控制器
文件頁數: 51/53頁
文件大小: 435K
代理商: M66290AGP
USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
51
11
9
8
Boundary scan
register (JTAGBSR)
Bypass register
(JTAGBPR)
ID code register
(JTAGIDR)
Decoder
Command register
(3bits) (JTAGIR)
TAP controller
Data register group
TDI
TMS
TCK
TRST
10
12 TDO
M66290A
Abstraction of JTAG
M66290A has JTAG (Joint Test Action Group) interface
which meets IEEE 1149.1 test access port spec.
This JTAG interface can be used for input/output path
(boundary scan path) for boundary scan test.
Further information as to JTAG test access port, refer
to "IEEE Std. 1149.1a-1993".
Pin descriptions
Pin description which relates to JTAG interface of
M66290A are as follows.
Test clock input (TCK)
Clock input into test circuit.
Test data input (TDI)
Synchronous serial input to input test command
code and test data. Data is sampled by the
positive edge of TCK.
Test data output (TDO)
Synchronous serial output to output test command
code and test data. Output data changes by the
negative edge of TCK and is output only in the state
of Shift-IR or Shift-DR. In other state,keeps "Z".
Test mode input (TMS)
Test mode select input to control status shift of test
circuit. This is sampled by the positive edge of TCK.
Test reset input (TRST)
"L" active test reset input to initialize the test circuit
asynchronously. To assure this reset function, keep
TMS input as "H" when this signal changes from "L"
to "H".
JTAG circuit constitution
JTAG circuit of M66290A is constituted by the blocks
as follows.
(1) Command register which keeps command code
which is fetched through the boundary scan path.
(2) Data register group which is accessed through the
boundary scan pass.
(3) Test access port (TAP) controller to control the
status shift of JTAG block.
(4) Control logic for input select, output select, and so.
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相關代理商/技術參數
參數描述
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