參數(shù)資料
型號： M66290AGP
廠商： Mitsubishi Electric Corporation
英文描述： USB DEVICE CONTROLLER
中文描述： USB設備控制器
文件頁數(shù)： 20/53頁
文件大小： 435K
代理商： M66290AGP
USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
20
(3) Control transfer / Enumeration
In control transfer, there are setup stage, data stage,
and status stage.
M66290A manages stage and inform CPU the stage
shift by interrupt. CPU do stage transact of control
transfer according to the interrupt factor.
Setup stage
In setup stage, 8Bytes request (setup data) of setup
transaction data packet which transferred from host
is stored into four registers automatically (Request,
Value, Index, and Length register).
Except for device state shift request (Set Address and
Set Configuration) which can cope with by the automatic
response control function, analysis (decode) and
execution of contents of request must be done by CPU.
By executing the request, it proceeds to data stage or
to status stage.
Data stage
Data stage executes IN transaction or OUT transaction
according to the contents of request. If it is control
write transfer, data stage is OUT transaction and CPU
prepares for data receive at the timing of interrupt in
setup stage and reads the received data from endpoint
FIFO when data receive ended.
USB bus connect
Full speed
device recognition
Clock ON
Initializing
Tr ON
Vbus interrupt
USB reset
USB reset receive
DVST interrupt
USB request
(Control transfer)
Get xx command
CTRT interrupt
Set response data
USB request
Set Address
CTRT/DVST interrupt
(Automatic response available)
USB request
Get xx command
CTRT interrupt
Set Configuration
CTRT/DVST interrupt
(Automatic response available)
USB request
USB request
Set xx command
CTRT interrupt
Set response data
Read received data
Default
state
Address
state
Configured
state
Idle
(Powered)
If it is control read transfer, data stage is IN transaction
and CPU prepares for data transmit (write into endpoint
FIFO) at the timing of interrupt in setup stage.
M66290A is equipped with control transfer continuous
transmit and receive function. After ended data stage,
it proceeds to status stage.
M66290A
Device firmware
Device state
Figure 3. Abstract of enumeration operations
Status stage
Status stage executes receive/transmit of Null data
(data length 0), in both control write and control read
transfer. Receive/transmit of Null data is possible to
set control transfer complete enable bit (CCPL) after
ended setup stage.
Control transfer complete enable bit is reset when
received setup packet.
Control transfer executes data transfer using EP0.
To both control read and control write, buffer size of
EP0 can be set by a unit of 64Bytes by "Control
Transfer Control Register".
Access to EP0_FIFO data register must be done by
CPU access. DMA transfer can not be set.
Figure 3. shows the abstract of enumeration
operations.
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相關代理商/技術參數(shù)
參數(shù)描述
M66291GP 制造商:Renesas Electronics Corporation 功能描述:
M66291GP#201 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP
M66291GP#RB0S 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
M66291GPRB0S 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48
M66291HP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller)
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