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| 型號： | M65727FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | MPEG2 MOTION ESTIMATION LSI |
| 中文描述： | 大規(guī)模集成電路的MPEG2運(yùn)動估計(jì) |
| 文件頁數(shù)： | 20/55頁 |
| 文件大?。?/td> | 242K |
| 代理商： | M65727FP |
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DISTRIBUTION RESTRICTED. COPYRIGHT RESERVED 1995
CONTACT MITSUBISHI ELECTRONICS REGARDING DISTRIBUTION
20
4. Operations
4.1 Reset Operation
When the RESET request signal (RESETC) is asserted to logical "L", M65727 goes into RESET
cycle. This RESET cycle continues for two cycles after the RESET request signal is negated. It is a
synchronized reset. It is sampled when the clock rises. It is prohibited to do activation for normal
operation during the RESET cycle.
When using M65727, it is necessary to execute this RESET operation before starting normal
operation. The RESETC signal must be asserted over two cycles. In addition, there should be at least
10 cycle space before the ESYNC is asserted in order to start normal operation.
Fig. 4.1-1 shows the RESET operation.
4.2 WAIT Operation
M65727 goes into WAIT cycle and stops the next cycle when the clock enable signal(CEC) is
negated to logical "H". The values of registers in M65727 are held so that operations will be able to
resume when the clock enable signal is asserted. The clock enable signal is sampled when the clock
rises.
Fig. 4.2-1 shows the WAIT operation.
4.3 Motion Detection Operation
In order to activate the motion estimation operation, which is a normal M65727 operation, it is
necessary, during the Field/frame mode, to input the search window image data, template MB data, and
the dynamic control input, in addition requesting the output and activating the execution cycle. In case
of the Field/Frame Dual-Prime mode, it is necessary to input the search window image data, input
template MB data, request output, activate processing cycle, and input dynamic control. Each
operation will be explained below.
4.3.1 Search Window Image Input for Field/Frame mode
The data input to M65727 during Field/Frame mode are the search window image data and the
template MB data. The search window image input can be performed in parallel with and independent
of the motion estimation operation. The search window image input starts at the cycle proceeding the
cycle where the sync signal SSYNC is asserted. When the vertical search range of ±7.5 is used,
DENSWC must be asserted for 128 cycles during the data input. When the vertical search range of
±15.5 is used, DENSWC must be asserted for 192 cycles. The valid cycle refers to the cycle whose
input data is specified as valid by the data enable specifying signal, DENSWC, of the search window
port. Specifying this data enable allows no wait data transfer using the faster frame memory (SRAM).
For lower cost implementation when DRAM is used as frame memory, wait states are useful to allow
slower data transfer.
Search window image is input in the order of raster scan starting from upper left of the screen. Four
vertical adjacent pixels are input simultaneously using 32 bit DSWI.
The data input must be completed within one execution cycle and at least 10 cycles or more space is
needed between ESYNC and SSYNC. As long as this limitation is obeyed, the search window image
input can be performed in parallel with the input of the template MB data and the actual arithmetic
operation of the motion estimation.
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