參數(shù)資料
型號(hào): M5M4V64S40ATP-8L
廠商: Mitsubishi Electric Corporation
英文描述: 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
中文描述: 64M號(hào)(4銀行甲1048576字x 16位)同步DRAM
文件頁數(shù): 48/51頁
文件大?。?/td> 1084K
代理商: M5M4V64S40ATP-8L
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM
A0-7
A10
DQMU/L
A8,9,11
SDRAM (Rev.1.3)
Mar'98
M5M4V64S40ATP-8A,-8L,-8, -10L, -10
DQM Read Mask @BL=4 CL=3
/CS
/RAS
/CAS
/WE
CKE
BA0,1
DQ
X
X
X
0
Y
0
0
Q0
Q0
Q0
Q0
Y
0
Q0
Q0
Q0
ACT#0
READ#0
READ#0
READ#0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
tRCD
CLK
Y
masked
masked
DQM read latency=2
48
Italic parameter
indicates minimum case
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