參數(shù)資料
型號(hào): M5M4V64S30ATP-10L
廠商: Mitsubishi Electric Corporation
英文描述: 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
中文描述: 64M號(hào)(4銀行甲2097152字× 8位)同步DRAM
文件頁(yè)數(shù): 38/51頁(yè)
文件大?。?/td> 1082K
代理商: M5M4V64S30ATP-10L
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
A0-8
A10
DQM
A9,11
Mar'98
SDRAM (Rev.1.3)
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
Page Mode Burst Write (multi bank) @BL=4
/CS
/RAS
/CAS
/WE
CKE
BA0,1
DQ
X
X
X
0
Y
0
0
D0
D0
D0
D0
ACT#0
WRITE#0
WRITE#0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
tRCD
D1
D1
D1
D1
Y
Y
0
WRITE#1
CLK
X
X
X
1
tRRD
1
Y
D0
D0
D0
D0
D0
D0
D0
ACT#1
WRITE#0
38
Italic parameter
indicates minimum case
相關(guān)PDF資料
PDF描述
M5M4V64S30ATP-10 Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85
M5M4V64S30ATP-12 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8 30V N-Channel PowerTrench MOSFET
M5M4V64S30ATP-8A Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85
M5M4V64S30ATP-8L Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85
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參數(shù)描述
M5M4V64S30ATP-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S30ATP-8L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S40ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM