參數(shù)資料
型號: M50FW080NB5TP
廠商: 意法半導體
英文描述: 8 Mbit 1Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory
中文描述: 8兆1兆× 8,統(tǒng)一座3V電源閃存固件集線器
文件頁數(shù): 40/56頁
文件大?。?/td> 292K
代理商: M50FW080NB5TP
DC and AC parameters
M50FW080
40/55
Figure 10.
FWH interface clock waveform
Table 21.
FWH interface clock characteristics
Symbol
Parameter
Test Condition
Value
Unit
t
CYC
CLK Cycle Time
(1)
1.
Devices on the PCI Bus must work with any clock frequency between DC and 33MHz. Below 16MHz
devices may be guaranteed by design rather than tested. Refer to PCI Specification.
Min
30
ns
t
HIGH
CLK High Time
Min
11
ns
t
LOW
CLK Low Time
Min
11
ns
CLK Slew Rate
peak to peak
Min
1
V/ns
Max
4
V/ns
AI03403
tHIGH
tLOW
0.6 VCC
0.5 VCC
0.4 VCC
0.3 VCC
0.2 VCC
tCYC
0.4 VCC, p-to-p
(minimum)
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