參數(shù)資料
型號: M48T254V-10ZA1
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復(fù)及定時提取
英文描述: REAL TIME CLOCK, PBGA168
封裝: 42.50 X 42.50 MM, 1.27 MM PITCH, BGA-168
文件頁數(shù): 26/26頁
文件大?。?/td> 366K
代理商: M48T254V-10ZA1
9/26
M48T254V
Figure 7. Memory READ Cycle
Note: WE is high for a READ cycle.
Figure 8. Memory WRITE Cycle, WRITE Enable Controlled
Note: 1. OE = VIH or VIL. If OE = VIH during a WRITE cycle, the output buffers remain in a high impedance state.
2. If the CE low transition occurs simultaneously with or later than the WE low transition in WE Controlled WRITE, the output buffers
remain in a high impedance state during this period.
3. If the CE high transition occurs simultaneously with the WE high transition, the output buffers remain in a high impedance state
during this period.
DQ0 - DQ7
ADDRESSES
OE
CE
DATA OUTPUT
VALID
tOD
tODO
tOE
tRC
tCO
tACC
tCOE
tOH
AI04230
AI05655
DQ0–DQ7
ADDRESSES
WE
CE
DATA IN
STABLE
tAH1
tOEW
tDH1
tDS
tWC
tODW
tWP
tAW
HIGH IMPEDANCE
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