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參數(shù)資料
| 型號： | M440T513Y-15ZA9 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | REAL TIME CLOCK, PBGA168 |
| 封裝： | PLASTIC, BGA-168 |
| 文件頁數(shù)： | 21/26頁 |
| 文件大?。?/td> | 453K |
| 代理商： | M440T513Y-15ZA9 |
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M440T513Y
4/26
SUMMARY DESCRIPTION
The M440T513Y TIMEKEEPER RAM is a
16Mbit, non-volatile static RAM organized as
512K by 32 bits and real time clock organized as
64 bytes by 8 bits. The special PBGA package
provides a fully integrated battery back-up memo-
ry and real time clock solution. In the event of pow-
er instability or absence, a self-contained battery
maintains the timekeeping operation and provides
power for a CMOS static RAM. Control circuitry
monitors VCC and invokes write protection to pre-
vent data corruption in the memory and RTC.
The clock keeps track of tenths/hundredths of sec-
onds, seconds, minutes, hours, day, date, month,
and year information. The last day of the month is
automatically adjusted for months with less than
31 days, including leap year correction.
The clock operates in one of two formats:
–
a 12-hour mode with an AM/PM indicator; or
–
a 24-hour mode
The M440T513Y is a 168-ball PBGA module that
integrates the RTC, the battery, and SRAM in one
package.
Figure 2. Logic Diagram
Table 1. Signal Names
AI07009
VCC
M440T513Y
VSS
BL
IRQ
RSV2
RSV1
A0 – A18
DQ0 – DQ31
DQC0 – DQC7
EC
W1 – W4
WC
G
GC
E1 – E4
A0 - A18
Address Inputs
DQ0 - DQ31
NVRAM Data Input/Output
DQC0 - DQC7
Clock Data Input/Output
E1 - E4
NVRAM Chip Enable Inputs
EC
Clock Chip Enable Input
W1 - W4
NVRAM WRITE Enable Inputs
WC
Clock WRITE Enable Input
G
Output Enable Input
GC
Clock Output Enable Input
BL
Battery Low Output (Open
Drain)
IRQ
Interrupt Output (Open Drain)
RSV1
Reserved
RSV2
Reserved
NC
No Connect
VCC
Supply Voltage
VSS
Ground
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