參數(shù)資料
型號(hào)： M41ST87YMX6
廠商： STMICROELECTRONICS
元件分類(lèi)： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 1 TIMER(S), REAL TIME CLOCK, PDSO28
封裝： 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOX-28
文件頁(yè)數(shù)： 32/52頁(yè)
文件大?。?/td> 689K
代理商： M41ST87YMX6
Clock operation
M41ST87Y, M41ST87W
Doc ID 9497 Rev 8
Table 10.
Reset AC characteristics
3.9
Power-fail comparators (1 and 2)
Two power-fail inputs (PFI1 and PFI2) are compared to an internal reference voltage (1.25V).
If either PFI1 or PFI2 is less than the power-fail threshold (VPFI), the associated power-fail
output (PFO1 or PFO2) will go low. This function is intended for use as an under-voltage
detector to signal a failing power supply. Typically PFI1 and PFI2 are connected through
external voltage dividers (see Figure 5 on page 11) to either the unregulated DC input (if it is
available) or the regulated output of the VCC regulator. The voltage divider can be set up
such that the voltage at PFI1 or PFI2 falls below VPFI several milliseconds before the
regulated VCC input to the M41ST87Y/W or the microprocessor drops below the minimum
operating voltage, thus providing an early warning of power failure.
During battery back-up, the power-fail comparator turns off and PFO1 and PFO2 go (or
remain) low. This occurs after VCC drops below VPFD(min). When power returns, PFO1 and
PFO2 are forced high, irrespective of VPFI for the write protect time (trec), which is the time
from VPFD(max) until the inputs are recognized. At the end of this time, the power-fail
comparator is enabled and PFO1 and PFO2 follow PFI1 and PFI2. If the comparator is
unused, PFI1 or PFI2 should be connected to VSS and the associated PFO1 or PFO2 left
unconnected.
3.10
Power-fail outputs
The PFO1 and PFO2 outputs are programmable as N-channel, open drain output drivers, or
full-CMOS output drivers. By setting the power-fail output open drain bit (PFOD) to a '1,' the
output will be configured as open drain (with IOL as specified in Table 17 on page 44). When
PFOD is set to '0,' the outputs will be configured as full-CMOS (sink and source current as
specified in Table 17 on page 23).
Note:
When configured as open drain (PFOD = '1'), PFO1 and PFO2 will require an external pull-
up resistor.
Symbol
Parameter(1)
1.
Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = 4.5 to 5.5 V or 2.7 to 3.6 V (except
where noted).
Min
Max
Unit
tR1
(2)
2.
Pulse widths of less than 100 ns will result in no RESET (for noise immunity).
RSTIN1 low to RST low (min pulse width)
100
200
ns
tR2
RSTIN2 low to RSTIN2 high (min pulse width)
100
200
ns
trec
(3)
3.
Programmable (see Table 12 on page 40). Same function as power-on reset.
RSTIN1 or RSTIN2 high to RST high
96
ms
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參數(shù)描述
M41ST87YMX6F 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
M41ST87YMX6TR 功能描述:實(shí)時(shí)時(shí)鐘 Serial 1280 (160x8) RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
M41ST87YSS6 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
M41ST87YSS6F 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
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