參數(shù)資料
型號: M41ST87YMX6
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO28
封裝: 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOX-28
文件頁數(shù): 11/52頁
文件大?。?/td> 689K
代理商: M41ST87YMX6
M41ST87Y, M41ST87W
Operating modes
Doc ID 9497 Rev 8
2.6.2
Tamper bits (TB1 and TB2)
If the TEBX bit is set, and a tamper condition occurs, the TBX bit will be set to '1.' This bit is
“Read-only” and is reset only by setting the TEBX bit to '0.' These bits are located in the flags
register 0Fh.
2.6.3
Tamper interrupt enable bits (TIE1 and TIE2)
If this bit is set to a logic '1,' the IRQ/OUT pin will be activated when a tamper event occurs.
This function is also valid in battery backup if the ABE bit (alarm in battery backup) is also
set to '1' (see Figure 15 on page 21).
Note:
In order to avoid an inadvertent activation of the IRQ/OUT pin due to a prior tamper event,
the flag register (0Fh) should be read prior to clearing and again setting the TEBX bit.
2.6.4
Tamper connect mode bit (TCM1 and TCM2)
This bit indicates whether the position of the external switch selected by the user is in the
normally open (TCMX = '1') or normally closed (TCMX = '0') position (see Figure 14 on
2.6.5
Tamper polarity mode bits (TPM1 and TPM2)
The state of this bit indicates whether the tamper pin input will be taken high (to VOUT if
TPMX = '1') or low (to VSS if TPMX = '0') to trigger a tamper event (see Figure 14 on page 20
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M41ST87YSS6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
M41ST87YSS6F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
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