參數(shù)資料
型號(hào): M39832-B12WNE6T
廠商: 意法半導(dǎo)體
英文描述: RECTIFIER, BRIDGE, 600V, 6A, PB-6
中文描述: 單芯片8兆1兆x8或512KB的x16閃存和256千位并行EEPROM存儲(chǔ)器
文件頁數(shù): 8/36頁
文件大?。?/td> 253K
代理商: M39832-B12WNE6T
EF
EE
G
W
Operation
V
IL
V
IH
V
IL
V
IH
Read in Flash Array
V
IH
V
IL
V
IL
V
IH
Read in EEPROM Array
V
IL
V
IH
V
IH
V
IL
Write in Flash Array
V
IH
V
IL
V
IH
V
IL
Write in EEPROM Array
V
IL
V
IH
V
IH
V
IH
Output Disable, DQn = Hi-Z
V
IH
V
IL
V
IH
V
IH
Output Disable, DQn = Hi-Z
V
IH
V
IH
X
X
Standby, DQn = Hi-Z
Note:
X = V
IL
or V
IH
.
Table 4. Basic Operations
Write Enable (W).
Addresses are latched on the
falling edge of W, and Data Inputs are latched on
the rising edge of W.
EEPROM Ready/Busy (ERB).
The EEPROM
Ready/Busy pin outputs the status of the device
when the EEPROM memory array is under the
write condition
– ERB = ’0’: internal writing is in process,
– ERB = ’1’: no internal writing in in process.
This status pin can be used when reading (or
fetching opcodes) in the Flash memory array.
The EEPROM Ready/Busy output uses an open
drain transistor, allowing therefore the use of the
M39832 in multi-memory applications with all
Ready/Busy outputs connected to a single
Ready/Busy line (OR-wired with an external pull-up
resistor).
Flash Ready/Busy (FRB).
Flash Ready/Busy is an
open-drain output and gives the internal state of
Flash array. When FRB is Low, the Flash array is
Busy with a Program or Erase operation and it will
not accept any additional program or erase instruc-
tions except the Erase Suspend instruction. When
FRB is High, the Flash array is ready for any Read,
Program or Erase operation. The FRB will also be
High when the Flash array is put in Erase Suspend
or Standby modes.
Reset/Block Temporary Unprotect Input (RP)
.
The RP Input provides hardware reset of the Flash
array and temporary unprotection of the protected
Flash block(s). Reset of the Flash array is
acheived by pulling RP to V
IL
for at least t
PLPX
.
When the reset pulse is given while the Flash array
is in Read or Standby modes, it will be available for
new operations in t
PHEL
after the rising edge of RP.
If the Flash array is in Erase, Erase Suspend or
Program modes the reset will take t
PLYH
during
which the FRB signal will be held at VIL. The end
of the Flash array reset will be indicated by the
rising edge of FRB. A hardware reset during an
Erase or Program operation will corrupt the data
being programmed or the block(s) being erased.
See Table 14 and Figure 9. Temporary block unpro-
tection is made by holding RP at V
ID
. In this condi-
tion, previously protected blocks can be
programmed or erased. The transition of RP from
V
IH
to V
ID
must be slower than t
PHPHH
. See Table
15 and Figure 9. When RP is returned from V
ID
to
V
IH
all blocks temporarily unprotected will be again
protected.
OPERATIONS
An operation is defined as the basic decoding of
the logic level applied to the control input pins (EF,
EE, G, W) and the specified voltages applied on
the relevant address pins. These operations are
detailed in Table 3.
Read.
Both Chip Enable and Output Enable (that
is EF and G or EE and G) must be low in order to
read the output of the memory.
Read operations are used to output the contents
from the Flash or EEPROM array, the Manufacturer
identifier, the Flash Block protection Status, the
Flash Identifier, the EEPROM identifier or the OTP
row content.
Notes:
– The Chip Enable input mainly provides power
control and should be used for device selection.
The Output Enable input should be used to gate
data onto the output in combination with active
EF or EE input signals.
– The data read depends on the previous instruc-
tion entered into the memory.
8/36
M39832
相關(guān)PDF資料
PDF描述
M39832-B15WNE6T TVS UNI-DIR 51V 600W DO-15
M42SP-7 Stepping Motors
M4565 LINEAR INTEGRATED CIRCUIT
M464S0924CT1-L1L 8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
M464S0924DTS-L1H 8Mx64 SDRAM SODIMM based on 8Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M39832-B15WNE1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory
M39832-B15WNE6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory
M39832NE 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory
M39832-T12WNE1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory
M39832-T12WNE6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 8 Mbit 1Mb x8 or 512Kb x16 Flash and 256 Kbit Parallel EEPROM Memory