參數(shù)資料
型號(hào): M38588GCFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42
封裝: 8.40 X 17.50 MM, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù): 31/77頁
文件大小: 824K
代理商: M38588GCFP
Rev.1.10
Apr 3, 2006
page 37 of 75
REJ03B0139-0110
3858 Group
(6) Programmable waveform generating mode
qMode selection
This mode can be selected by setting “100” to the timer Z2 operat-
ing mode bits (bits 2 to 0) and setting “0” to the timer/event
counter mode switch bit (b7) of the timer Z2 mode register (ad-
dress 002B16).
qCount source selection
In high-, or middle-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/
128, 1/256, 1/512 or 1/1024 of f(XIN); or f(XCIN) can be selected as
the count source.
In low-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, 1/
512 or 1/1024 of f(XCIN); or f(XCIN) can be selected as the count
source.
qInterrupt
The interrupt at an underflow is the same as the timer mode’s.
qExplanation of operation
The operation is the same as the timer mode’s. Moreover the
timer outputs the data set in the output level latch (bit 4) of the
timer Z2 mode register (address 002B16) from the CNTR3 pin
each time the timer underflows.
Changing the value of the output level latch and the timer latch af-
ter an underflow makes it possible to output an optional waveform
from the CNTR3 pin.
sPrecautions
The double-function port of CNTR3 pin and port P23 is automati-
cally set to the programmable waveform generating port in this
mode.
Figure 34 shows the timing chart of the programmable waveform
generating mode.
(7) Programmable one-shot generating mode
qMode selection
This mode can be selected by setting “101” to the timer Z2 operat-
ing mode bits (bits 2 to 0) and setting “0” to the timer/event
counter mode switch bit (b7) of the timer Z2 mode register (ad-
dress 002B16).
qCount source selection
In high-, or middle-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/
128, 1/256, 1/512 or 1/1024 of f(XIN); or f(XCIN) can be selected as
the count source.
qInterrupt
The interrupt at an underflow is the same as the timer mode’s.
The trigger to generate one-shot pulse can be selected by the
INT2 active edge selection bit (bit 2) of the interrupt edge selection
register (address 003A16). When it is “0”, the falling edge active is
selected; when it is “1”, the rising edge active is selected.
When the valid edge of the INT2 pin is detected, the INT2 interrupt
request bit (bit 2) of the interrupt request register 1 (address
003C16) is set to “1”.
qExplanation of operation
“H” one-shot pulse; Bit 5 of timer Z2 mode register = “0”
The output level of the CNTR3 pin is initialized to “L” at mode se-
lection. When trigger generation (input signal to INT2 pin) is
detected, “H” is output from the CNTR3 pin. When an underflow
occurs, “L” is output. The “H” one-shot pulse width is set by the
setting value to the timer Z2 register low-order and high-order.
When trigger generating is detected during timer count stop, al-
though “H” is output from the CNTR3 pin, “H” output state contin-
ues because an underflow does not occur.
“L” one-shot pulse; Bit 5 of timer Z2 mode register = “1”
The output level of the CNTR3 pin is initialized to “H” at mode se-
lection. When trigger generation (input signal to INT2 pin) is
detected, “L” is output from the CNTR3 pin. When an underflow
occurs, “H” is output. The “L” one-shot pulse width is set by the
setting value to the timer Z2 low-order and high-order. When trig-
ger generating is detected during timer count stop, although “L” is
output from the CNTR3 pin, “L” output state continues because an
underflow does not occur.
sPrecautions
Set the double-function port of INT2 pin and port P43 to input in
this mode.
Set the double function port of CNTR3 pin and port P23 is automati-
cally set to the programmable one-shot generating port in this mode.
This mode cannot be used in low-speed mode.
If the value of the CNTR3 active edge switch bit is changed during
one-shot generating enabled or generating one-shot pulse, then
the output level from CNTR3 pin changes.
Figure 35 shows the timing chart of the programmable one-shot
generating mode.
sNotes regarding all modes
qTimer Z2 write control
Which write control can be selected by the timer Z2 write control
bit (bit 3) of the timer Z2 mode register (address 002B16), writing
data to both the latch and the timer at the same time or writing
data only to the latch.
When the operation “writing data only to the latch” is selected, the
value is set to the timer latch by writing data to the address of timer
Z2 and the timer is updated at next underflow. After reset release, the
operation “writing data to both the latch and the timer at the same
time” is selected, and the value is set to both the latch and the timer
at the same time by writing data to the address of timer Z2.
In the case of writing data only to the latch, if writing data to the
latch and an underflow are performed almost at the same time,
the timer value may become undefined.
qTimer Z2 read control
A read-out of timer value is impossible in pulse period measure-
ment mode and pulse width measurement mode. In the other
modes, a read-out of timer value is possible regardless of count
operating or stopped.
However, a read-out of timer latch value is impossible.
qSwitch of interrupt active edge of CNTR3 and INT2
Each interrupt active edge depends on setting of the CNTR3 ac-
tive edge switch bit and the INT2 active edge selection bit.
qSwitch of count source
When switching the count source by the timer Z2 count source selec-
tion bits, the value of timer count is altered in inconsiderable amount
owing to generating of thin pulses on the count input signals.
Therefore, select the timer count source before setting the value
to the prescaler and the timer.
qUsage of CNTR3 pin as normal I/O port P23
To use the CNTR3 pin as normal I/O port P23, set timer Z2 operat-
ing mode bits (b2, b1, b0) of timer Z2 mode register (address
002B16) to “000”.
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