參數(shù)資料
型號(hào)： M38507M8-XXXFP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 46/99頁
文件大小： 1384K
代理商： M38507M8-XXXFP
46
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3850 Group (Spec. H)
Fig. 50 Internal status at reset (spec. H)
Note :
X : Not fixed
Since the initial values for other than above mentioned registers and
RAM contents are indefinite at reset, they must be set.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
Address Register contents
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
FF
16
01
16
00
16
00
16
FF
16
FF
16
FF
16
FF
16
00
16
Port P0 (P0)
Port P0 direction register (P0D)
Port P1 (P1)
Port P1 direction register (P1D)
Port P2 (P2)
Port P2 direction register (P2D)
Port P3 (P3)
Port P3 direction register (P3D)
Port P4 (P4)
Port P4 direction register (P4D)
Serial I/O2 control register 1 (SIO2CON1)
Serial I/O2 control register 2 (SIO2CON2)
Serial I/O2 register (SIO2)
Transmit/Receive buffer register (TB/RB)
Serial I/O1 status register (SIOSTS)
Serial I/O1 control register (SIOCON)
UART control register (UARTCON)
Baud rate generator (BRG)
PWM control register (PWMCON)
PWM prescaler (PREPWM)
PWM register (PWM)
Prescaler 12 (PRE12)
Timer 1 (T1)
Timer 2 (T2)
Timer XY mode register (TM)
Prescaler X (PREX)
Timer X (TX)
Prescaler Y (PREY)
Timer Y (TY)
Timer count source selection register (TCSS)
A-D control register (ADCON)
A-D conversion low-order register (ADL)
A-D conversion high-order register (ADH)
0 0 0 0 0 1 1 1
1 0 0 0 0 0 0 0
X X X X X X X X
0000
16
0001
16
0002
16
0003
16
0004
16
0005
16
0006
16
0007
16
0008
16
0009
16
0015
16
0016
16
0017
16
0018
16
0019
16
001A
16
001B
16
001C
16
001D
16
001E
16
001F
16
0020
16
0021
16
0022
16
0023
16
0024
16
0025
16
0026
16
0027
16
0028
16
0034
16
0035
16
0036
16
1 1 1 0 0 0 0 0
X X X X X X X X
X X X X X X X X
X X X X X X X X
X X X X X X X X
0 0 0 1 0 0 0 0
X X X X X X X X
X X
00
16
00
16
00
16
00
16
00
16
00
16
(34)
(35)
(36)
(37)
(38)
(39)
(40)
(41)
(42)
(43)
Register contents
0038
16
0039
16
003A
16
003B
16
003C
16
003D
16
003E
16
003F
16
(PS)
(PC
H
)
(PC
L
)
Address
X X X X X 1 X X
FFFD
16
contents
FFFC
16
contents
0 0 1 1 1 1 1 1
0 1 0 0 1 0 0 0
MISRG
Watchdog timer control register (WDTCON)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
Processor status register
Program counter
0 0 0 0 0 0
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