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| 型號(hào)： | M38039FFLHP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁(yè)數(shù)： | 5/121頁(yè) |
| 文件大小： | 2071K |
| 代理商： | M38039FFLHP |
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Rev.1.01
Jan 25, 2008
Page 100 of 117
REJ03B0212-0101
3803 Group (Spec.L)
Notes on Restarting Oscillation
Restarting oscillation
Usually, when the MCU stops the clock oscillation by STP
instruction and the STP instruction has been released by an
external interrupt source, the fixed values of Timer 1 and
Prescaler 12 (Timer 1 = “0116”, Prescaler 12 = “FF16”) are
automatically reloaded in order for the oscillation to stabilize.
The user can inhibit the automatic setting by writing “1” to bit 0
of MISRG (address 001016).
However, by setting this bit to “1”, the previous values, set just
before the STP instruction was executed, will remain in Timer 1
and Prescaler 12. Therefore, you will need to set an appropriate
value to each register, in accordance with the oscillation
stabilizing time, before executing the STP instruction.
<Reason>
Oscillation will restart when an external interrupt is received.
However, internal clock
φ is supplied to the CPU only when
Timer 1 starts to underflow. This ensures time for the clock
oscillation using the ceramic resonators to be stabilized.
Notes on Using Stop Mode
Register setting
Since values of the prescaler 12 and Timer 1 are automatically
reloaded when returning from the stop mode, set them again,
respectively. (When the oscillation stabilizing time set after STP
instruction released bit is “0”)
Clock restoration
After restoration from the stop mode to the normal mode by an
interrupt request, the contents of the CPU mode register previous
to the STP instruction execution are retained. Accordingly, if
both main clock and sub clock were oscillating before execution
of the STP instruction, the oscillation of both clocks is resumed
at restoration.
In the above case, when the main clock side is set as a system
clock, the oscillation stabilizing time for approximately 8,000
cycles of the XIN input is reserved at restoration from the stop
mode. At this time, note that the oscillation on the sub clock side
may not be stabilized even after the lapse of the oscillation
stabilizing time of the main clock side.
Notes on Wait Mode
Clock restoration
If the wait mode is released by a reset when XCIN is set as the
system clock and XIN oscillation is stopped during execution of
the WIT instruction, XCIN oscillation stops, XIN oscillations
starts, and XIN is set as the system clock.
In the above case, the RESET pin should be held at “L” until the
oscillation is stabilized.
Notes on CPU rewrite mode of flash memory version
1. Operation speed
During CPU rewrite mode, set the system clock
φ 4.0 MHz or
less using the main clock division ratio selection bits (bits 6 and
7 of address 003B16).
2. Instructions inhibited against use
The instructions which refer to the internal data of the flash
memory cannot be used during the CPU rewrite mode.
3. Interrupts inhibited against use
The interrupts cannot be used during the CPU rewrite mode
because they refer to the internal data of the flash memory.
4. Watchdog timer
In case of the watchdog timer has been running already, the
internal reset generated by watchdog timer underflow does not
happen, because of watchdog timer is always clearing during
program or erase operation.
5. Reset
Reset is always valid. In case of CNVSS = “H” when reset is
released, boot mode is active. So the program starts from the
address contained in address FFFC16 and FFFD16 in boot ROM
area.
Notes on flash memory version
The CNVSS pin determines the flash memory mode.
Connect the CNVSS pin the shortest possible to the GND pattern
which is supplied to the VSS pin of the microcomputer.
In addition connecting an approximately 5 k
. resistor in series
to the GND could improve noise immunity. In this case as well
as the above mention, connect the pin the shortest possible to the
GND pattern which is supplied to the VSS pin o f the
microcomputer.
Note. When the boot mode or the standard serial I/O mode is used, a
switch of the input level to the CNVSS pin is required.
Fig 99. Wiring for the CNVSS
Notes on electric characteristic differences between
mask ROM and flash nemory version MCUs
There are differences in electric characteristics, operation
margin, noise immunity, and noise radiation between Mask
ROM and Flash Memory version MCUs due to the difference in
the manufacturing processes, built-in ROM, and layout pattern
etc. When manufacturing an application system with the Flash
Memory version and then switching to use of the Mask ROM
version, please conduct evaluations equivalent to the system
evaluations conducted for the flash memory version.
DATA REQUIRED FOR MASK ORDERS
The following are necessary when ordering a mask ROM
production:
1. Mask ROM Confirmation Form*
2. Mark Specification Form*
3. Data to be written to ROM, in EPROM form (three identical
copies)
* For the mask ROM confirmation and the mark specifications,
refer to the “Renesas Technology Corp.” Homepage
(http://www.renesas.com/en/rom).
The shortest
CNVSS
VSS
Approx. 5k
The shortest
(Note)
Note: Shows the microcomputer’s pin.
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| M38039FFLSP | 8-BIT, FLASH, 16.8 MHz, MICROCONTROLLER, PDIP64 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38039FFLHP#U0 | 功能描述:IC 3803 MCU FLASH 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 產(chǎn)品培訓(xùn)模塊:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 標(biāo)準(zhǔn)包裝:1 系列:M16C™ M32C/80/87 核心處理器:M32C/80 芯體尺寸:16/32-位 速度:32MHz 連通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外圍設(shè)備:DMA，POR，PWM，WDT 輸入/輸出數(shù):121 程序存儲(chǔ)器容量:384KB（384K x 8） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:- RAM 容量:24K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 34x10b，D/A 2x8b 振蕩器型:內(nèi)部 工作溫度:-20°C ~ 85°C 封裝/外殼:144-LQFP 包裝:托盤(pán) 產(chǎn)品目錄頁(yè)面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87 |
| M38039FFLKP#U0 | 制造商:Renesas 功能描述:MCU 8-bit 740 CISC 60KB Flash 3.3V/5V 64-Pin LQFP Tray |
| M38039FFLKPU0 | 制造商:Renesas Electronics Corporation 功能描述:8bit MCU,3803,61K ProgROM,2K RAM,LQFP64 |
| M38039FFSP | 制造商:Mitsubishi Electric 功能描述:8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PDIP64 |
| M38039G4HHP#U0 | 功能描述:IC 740/3803 MCU QZROM 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:- 程序存儲(chǔ)器類(lèi)型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線(xiàn)） 包裝:帶卷 (TR) |
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