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參數(shù)資料
| 型號： | M37920S4CGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 34/39頁 |
| 文件大?。?/td> | 438K |
| 代理商： | M37920S4CGP |
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PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
M37920S4CGP
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
4
Vcc, Vss
MD0
MD1
RESET
XIN
XOUT
BYTE
AVcc,
AVss
VREF
A0–A7
A8–A15/
MA0–MA7
A16–A23/
MA8–MA11
D0–D7
P20/D8–
P27/D15
P30/RDY,
RD,
BLW,
P33/BHW
P40/ALE,
P41/
φ1,
P42/TC,
P43/HOLD,
P44/HLDA
P50–P57
P60–P66
Power supply input
MD0
MD1
Reset input
Clock input
Clock output
External data bus width
select input
Analog power supply input
Reference voltage input
Low-order address
Middle-order address/
DRAM address
High-order address/
DRAM address
Low-order data
I/O port P2/
High-order data
Memory control signal I/O
I/O port P4
I/O port P5
I/O port P6
—
Input
Output
Input
—
Input
Output
I/O
Input
Output
I/O
Input
Output
I/O
Apply 5 V±10 % to Vcc, and 0 V to Vss.
This pin controls the processor mode. Connect this pin to VCC.
Connect this pin to Vss.
The microcomputer is reset when “L” level is applies to this pin.
These are input and output pins of the internal clock generating circuit. Connect a
ceramic or quartz- crystal resonator between the XIN and XOUT pins. When an
external clock is used, the clock source should be connected to the XIN pin, and the
XOUT pin should be left open.
This pin determines whether the external data bus has an 8-bit width or 16-bit width
for the memory expansion mode or microprocessor mode. The width is 16 bits when
“L” signal is input, and 8 bits when “H” signal is input.
Power supply input pin for the A-D converter. Connect AVcc to Vcc, and AVss to Vss
externally.
This is the reference voltage input pin for the A-D converter.
The low-order 8 bits of address (A0–A7) are output.
The middle-order 8 bits of address (A8–A15) are input/output. While DRAM space is
accessed, multiplexed address (MA0–MA7) is output.
The high-order 8 bits of address (A16–A23) are output. While DRAM space is ac-
cessed, multiplexed address (MA8–MA11) is output.
The low-order 8 bits of data (D0–D7) are input/output.
s When 8-bit external data bus is used (BYTE = “H” level)
Port P2 is an 8-bit I/O port.
s When 16-bit external data bus is used (BYTE = “L” level)
The high-order 8 bits (D8–D15) are input/output.
While the input level at pin RDY is “L”, the microcomputer is placed in the ready
state. While pin RD is at “L” level, the microcomputer reads out data and instruc-
tion codes. Also, pin RDY can function as a programmable I/O port pin (P30) by
software.
s When 8-bit external data bus is used (BYTE = “H” level)
While pin BLW is at “L” level, the microcomputer writes data.
s When 16-bit external data bus is used (BYTE = “L” level)
While pin BLW is at “L” level, the microcomputer writes data into an even-
numbered address.
While pin BHW is at “L” level, the microcomputer writes data into an odd-
numbered address.
Signal ALE is used to latch an address.
φ1 has the same period as internal clock φ.
Pin P42 functions as a programmable I/O port pin.
While the input level at pin HOLD is at “L” level, the microcomputer is placed in the
hold state. Signal HLDA is used to inform the external that the microcomputer
enters the hold state. By software, pin ALE, clock
φ1 output pin, and pins HOLD,
HLDA function as programmable I/O port pins (P40, P41, P43, P44). Pin P42 also
functions as pin TC.
Port P5 is an 8-bit I/O port. These pins also function as I/O pins for timers A0, A2,
and pulse output pins for the real-time output.
Port P6 is a 7-bit I/O port. These pins also function as I/O pins for timers A1, A3,
A4, input pins for DMA requests, and output pins for DMA acknowledge signals.
PIN DESCRIPTION (Microcomputer mode)
Functions
Input/
Output
Name
Pin
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