參數(shù)資料
型號: M37920S4CGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 20 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 23/39頁
文件大小: 438K
代理商: M37920S4CGP
3
M37920S4CGP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
ROM
RAM
P2, P5
P3
P4
P6, P8
P7
P9
P12
TA0–TA4
TB0–TB2
UART0 and UART1
Memory expansion
Operating temperature range
Device structure
Package
Number of basic machine instructions
Instruction execution time
External clock input frequency f(XIN)
Memory size
Programmable input/output
ports
Multi-functional timers
Serial I/O
A-D converter
Watchdog timer
DMA controller
DRAM controller
Chip-select wait control
Real-time output
Interrupts
Clock generating circuit
Power supply voltage
Power dissipation
Ports’ input/output
characteristics
FUNCTIONS (Microcomputer mode)
Functions
Parameter
Input/Output withstand voltage
Output current
203
50 ns (the fastest instruction at f(XIN) = 20 MHz)
20 MHz (Max.)
External
2048 bytes
8-bit ! 2
2-bit ! 1
5-bit ! 1
7-bit ! 2
4-bit ! 1
6-bit ! 1
3-bit ! 1
16-bit ! 5
16-bit ! 3
(UART or Clock synchronous serial I/O) ! 2
10-bit successive approximation method ! 1 (4 channels)
12-bit ! 1
4 channels
Maximum transfer rate
20 Mbytes/sec.
(at f(XIN) = 20 MHz, 0 wait, 1-bus cycle transfer)
10 Mbytes/sec.
(at f(XIN) = 20 MHz, 0 wait, 2-bus cycles transfer)
1 channel
Supports fast page access mode.
Incorporates 8-bit refresh timer.
Supports CAS before RAS refresh method or self refresh method.
Chip select area ! 4 (CS0–CS3). A wait number and bus width
can be set for each chip select area.
4 bits ! 2 channels; or 6 bits ! 1 channel + 2 bits ! 1 channel
6 external types, 17 internal types. Each interrupt except NMI
can be set to a priority level within the range of 0–7 by software.
Built-in (externally connected to a ceramic resonator or quartz
crystal resonator).
5 V±10 %
135 mW (at f(XIN) = 20 MHz, typ.)
5 V
5 mA
Up to 16 Mbytes. Note that bank FF16 is a reserved area.
–20 to 85 °C
CMOS high-performance silicon gate process
100-pin plastic molded QFP
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