參數(shù)資料
型號: M37906M6C-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42
封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù): 32/104頁
文件大?。?/td> 995K
代理商: M37906M6C-XXXFP
30
M37906M4C-XXXFP, M37906M4C-XXXSP, M37906M4H-XXXFP
M37906M4H-XXXSP, M37906M6C-XXXFP, M37906M6C-XXXSP
M37906M8C-XXXFP, M37906M8C-XXXSP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
param
etric
lim
its are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
When a phase-related pulse with a falling edge input to the TAkOUT
pin is input after the level of TAkIN pin changes from “H” to “L”, the
count is decremented at the respective rising edge and falling edge
of the TAkIN pin and TAkOUT pin. When performing this two-phase
pulse signal processing, timer Aj mode register bit 0 and bit 4 must
be set to “1” and bits 1, 2, 3, and 5 must be “0”. Bits 6 and 7 are ig-
nored. (See Figure 27.) Note that bits 5 and 7 of the up-down regis-
ter 0 (address 4416) are the two-phase pulse signal processing
select bits for timers A2 and A4 respectively. Also, bit 7 of the up-
down register 1 (address C416) is the two-phase pulse signal pro-
cessing select bit for timer A9. Each timer operates in normal event
counter mode when the corresponding bit is “0” and performs two-
phase pulse signal processing when it is “1”.
Count is started by setting the count start bit to “1”. Data write and
read are performed in the same way as for normal event counter
mode. Note that the direction register of the input port must be set to
input mode because two kinds of pulse signals, described above,
are input. Also, there can be no pulse output in this mode.
Fig. 27 Bit configuration of timer Aj mode register when performing
two-phase pulse signal processing in event counter mode
Fig. 25 Two-phase pulse processing operation of timer A2
Fig. 26 Two-phase pulse processing operation of timers A4 and A9
76543210
1
0
×
0100
0 1 : Always “01” in event counter mode
0 1 0 0 : Always “0100” when processing
two-phase pulse signal
× × : Not used in event counter mode
Timer A2 mode register
Timer A4 mode register
Timer A9 mode register
Addresses
5816
5A16
CA16
TA2OUT
TA2IN
Decre-
ment-
count
Decre-
ment-
count
Decre-
ment-
count
Incre-
ment-
count
Incre-
ment-
count
Incre-
ment-
count
TAkOUT
TAkIN
(k = 4, 9)
Decrement-count at each edge
Increment-count at each edge
Decrement-count at each edge
Increment-count at each edge
Fig. 24 Bit configuration of up-down register
Timer A0 up-down bit
Timer A1 up-down bit
Timer A2 up-down bit
Timer A3 up-down bit
Timer A4 up-down bit
Timer A2 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A3 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A4 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Up-down register 0
Address
4416
76543210
Timer A5 up-down bit
Timer A6 up-down bit
Timer A7 up-down bit
Timer A8 up-down bit
Timer A9 up-down bit
Timer A7 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A8 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A9 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Up-down register 1
Address
C416
76543210
Note: Each of timers A3, and A5 through A8 has no I/O pin. Therefore, the content of this bit is invalid.
相關PDF資料
PDF描述
M37906M8C-XXXFP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42
M37906M4H-XXXSP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP42
M37906M4C-XXXFP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42
M37906M8C-XXXFP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42
M37906M6C-XXXSP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP42
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