參數(shù)資料
型號: M37906M4C-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42
封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù): 4/99頁
文件大?。?/td> 1313K
代理商: M37906M4C-XXXFP
125
8168C-MCU Wireless-02/10
AT86RF212
7.8.5 Interrupt Handling
Two different interrupts indicate the PLL status. IRQ_0 (PLL_LOCK) indicates that the
PLL has locked. IRQ_1 (PLL_UNLOCK) indicates an unexpected unlock condition. A
PLL_LOCK interrupt clears any preceding PLL_UNLOCK interrupt automatically and
vice versa.
A PLL_LOCK interrupt occurs in the following situations:
State change from TRX_OFF to PLL_ON / RX_ON
Frequency setting change in states PLL_ON / RX_ON
A manually started center frequency calibration has been completed
All other PLL_LOCK interrupt events indicate that the PLL locked again after a prior
unlock happened.
A PLL_UNLOCK interrupt occurs in the following situations:
A manually initiated center frequency calibration in states PLL_ON / (RX_ON)
Frequency setting change in states PLL_ON / RX_ON
PLL_LOCK and PLL_UNLOCK affect the behavior of the transceiver:
In states BUSY_TX and BUSY_TX_ARET the transmission is stopped and the
transceiver returns into state PLL_ON. During BUSY_RX and BUSY_RX_AACK, the
transceiver returns to state RX_ON and RX_AACK_ON, respectively, once the PLL has
locked.
7.8.6 Register Description
Register 0x08 (PHY_CC_CCA):
The register PHY_CC_CCA contains register bits to set the channel center frequency
according to channel page 0 of IEEE 802.15.4-2003/2006 for the European and North
American band. A write access to the register bits CHANNEL sets the channel number;
a read access shows the current channel number. It is necessary to set register bits
CC_BAND (register 0x14, CC_CTRL_1) to 0 in order to enable the above described
channel selection, see Table 7-35.
Table 7-36. Register 0x08 (PHY_CC_CCA)
Bit
7
6
5
4
Name
CCA_REQUEST
CCA_MODE
CHANNEL[4]
Read/Write
W
R/W
Reset Value
0
1
0
Bit
3
2
1
0
Name
CHANNEL[3]
CHANNEL[2]
CHANNEL[1]
CHANNEL[0]
Read/Write
R/W
Reset Value
0
1
0
1
Bit 7:5
Refer to section 6.6.6.
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