參數(shù)資料
型號(hào)： M37906M4C-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42
封裝： 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁(yè)數(shù)： 20/99頁(yè)
文件大?。?/td> 1313K
代理商： M37906M4C-XXXFP
49
8168C-MCU Wireless-02/10
AT86RF212
Table 5-9. Configuration of IEEE 802.15.4 Devices
Register
Address
Register
Bit
Name
Description
0x20,0x21
0x22,0x23
0x24
…
0x2B
SHORT_ADDR_0/1
PAN_ADDR_0/1
IEEE_ADDR_0
…
IEEE_ADDR_7
Setup Frame Filter, see section 6.2.1
0x0C
7
RX_SAFE_MODE
0: Disable frame protection
1: Enable frame protection
0x2C
0
SLOTTED_OPERATION
0: Transceiver operates in unslotted
mode.
1: Transceiver operates in slotted mode,
see section 5.2.3.5
0x2E
7:6
AACK_FVN_MODE
Controls the ACK behavior, depending on
FCF frame version number
b00: Acknowledges only frames with
version number 0, i.e. according to
IEEE 802.15.4-2003 frames
b01: Acknowledges only frames with
version number 0 or 1, i.e. frames
according to IEEE 802.15.4-2003/2006
b10: Acknowledges only frames with
version number 0 or 1 or 2
b11: Acknowledges all frames
independent of the FCF frame version
number
Notes
The default value of the short address is 0xFFFF. Thus, if no short address has been
configured, only frames with either the broadcast address or the IEEE address are
accepted by the frame filter.
In the IEEE 802.15.4-2003 standard the frame version subfield does not yet exist but
is marked as reserved. According to this standard, reserved fields have to be set to
zero. At the same time, the IEEE 802.15.4-2003 standard requires ignoring reserved
bits upon reception. Thus, there is a contradiction in the standard which can be
interpreted in two ways:
1. If a network should only allow access to nodes compliant to IEEE 802.15.4-2003,
then AACK_FVN_MODE should be set to 0.
2. If a device should acknowledge all frames independent of its frame version,
AACK_FVN_MODE should be set to 3. However, this may result in conflicts with
co-existing IEEE 802.15.4-2006 standard compliant networks.
The same holds for PAN coordinators, see below.
PAN Coordinator
Table 5-10 shows the RX_AACK configuration registers required to setup a PAN
coordinator device.
相關(guān)PDF資料
PDF描述
M37906M8C-XXXFP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDSO42
M37906M6C-XXXSP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP42
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M37906M4C-XXXSP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP42
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